/**@file
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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include("GpioLibObjects.asl")
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//
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// PADCFG register is split into multiple DW registers
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// PAD_CFG_SIZE holds number of bytes used by all those registers for one pad
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//
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#define PAD_CFG_SIZE 0x08
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//
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// Get number of DoubleWord registers used by one group
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//
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#define TOTAL_NUMBER_OF_DW_REGS_FOR_GPIO_GROUP(GpioGroupIndex) \
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( \
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Add( \
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ShiftRight( \
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GINF(GpioGroupIndex,GPIO_PAD_NUM_FIELD), \
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5), \
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1) \
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)
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//
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// Check if group belongs to 2-Tier GPE
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//
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#define IS_GPIO_GROUP_IN_2_TIER_GPE(GpioGroupIndex) \
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( \
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LEqual( \
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And( \
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ShiftRight( \
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GPEM, \
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Multiply( \
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GpioGroupIndex, \
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2)), \
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0x3), \
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0x0) \
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)
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//
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// Get PADCFG_DW0 GpioPad register address
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//
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#define GET_GPIO_PAD_PADCFG_REG_ADDRESS(GpioGroupIndex,GpioPadNumber) \
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( \
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Add( \
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GET_PADCFG_REG_ADDRESS(GpioGroupIndex), \
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Multiply( \
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GpioPadNumber, \
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PAD_CFG_SIZE) \
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) \
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)
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//
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// Get GPIO register address
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// If group has more DW registers for certain feature
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// below macro will return address of the first one.
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//
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#define GET_PADCFG_REG_ADDRESS(GpioGroupIndex) GADR(GpioGroupIndex,GPIO_PADCFG_REG_FIELD)
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#define GET_HOSTSW_OWN_REG_ADDRESS(GpioGroupIndex) GADR(GpioGroupIndex,GPIO_HOSTOWN_REG_FIELD)
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#define GET_PAD_OWN_REG_ADDRESS(GpioGroupIndex) GADR(GpioGroupIndex,GPIO_PADOWN_REG_FIELD)
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#define GET_GPE_STS_REG_ADDRESS(GpioGroupIndex) GADR(GpioGroupIndex,GPIO_GPE_STS_REG_FIELD)
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//
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// GPIO Access Library
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//
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Scope(\_SB)
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{
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//
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// Arg1 possible values for internal GINF function
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//
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#define GPIO_COM_FIELD 0
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#define GPIO_PAD_NUM_FIELD 1
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#define GPIO_PADCFG_REG_FIELD 2
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#define GPIO_HOSTOWN_REG_FIELD 3
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#define GPIO_PADOWN_REG_FIELD 4
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#define GPIO_GPE_STS_REG_FIELD 5
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//
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// Get GPIO group information
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// This is internal library function
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//
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Method(GINF, 0x2, NotSerialized)
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{
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//
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// Arg0 - GPIO Group index
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// Arg1 - GPIO field type
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//
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If(LEqual(PCHS, SPTL)) { // PCH-LP
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Return (PCH_LP_GPIO_GET_FIELD(Arg0,Arg1))
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} Else { //PCH-H
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Return (PCH_H_GPIO_GET_FIELD(Arg0,Arg1))
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}
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}
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//
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// Get GPIO maximal group
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// This is internal library function
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//
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Method(GMXG, 0x0, NotSerialized)
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{
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If(LEqual(PCHS, SPTL)) { // PCH-LP
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Return (V_PCH_LP_GPIO_GROUP_MAX)
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} Else { //PCH-H
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Return (V_PCH_H_GPIO_GROUP_MAX)
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}
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}
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//
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// Get GPIO register address
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// This is internal library function
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//
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Method(GADR, 0x2, NotSerialized)
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{
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//
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// Arg0 - GPIO Group index
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// Arg1 - GPIO register type, must match what is used by GINF method
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//
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//Local0 = GpioCommunityAddress
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Store( Add(GINF(Arg0,GPIO_COM_FIELD), SBRG), Local0)
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//Local1 = Register Offset
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Store(GINF(Arg0,Arg1), Local1)
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Return( Add (Local0, Local1))
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}
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//
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// Get GPIO absolute number for selected GpioPad
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//
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Method(GNUM, 0x1, NotSerialized)
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{
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//
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// Arg0 - GpioPad
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//
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// Local0 - Gpio pad number
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Store (GNMB(Arg0), Local0)
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// Local1 - Gpio group index for GpioPad
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Store (GGRP(Arg0), Local1)
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Return (Add(Local0,Multiply(Local1, 24)))
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}
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//
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// Get interrupt number for selected GpioPad
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//
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Method(INUM, 0x1, NotSerialized)
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{
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//
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// Arg0 - GpioPad
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//
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// Local1 - Gpio pad number
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Store (GNMB(Arg0), Local1)
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// Local2 - Gpio group index for GpioPad
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Store (GGRP(Arg0), Local2)
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// Local3 - Group index used in a loop
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Store (0 , Local3)
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While(LLess (Local3, Local2)) {
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// Get Number of GpioPads for certain Group (GroupIndex - Local3) and add it to Local1
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Add( GINF(Local3,GPIO_PAD_NUM_FIELD) ,Local1,Local1)
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Increment(Local3)
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}
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return(Add(24,Mod(Local1,96)))
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}
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//
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// Get GPIO group index for GpioPad
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//
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Method(GGRP,1,serialized) {
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//
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// Arg0 - GpioPad
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//
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ShiftRight( And(Arg0,0x00FF0000), 16, Local0)
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return (Local0)
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}
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//
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// Get GPIO pin number for GpioPad
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//
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Method(GNMB,1,serialized) {
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//
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// Arg0 - GpioPad
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//
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return (And(Arg0,0x0000FFFF))
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}
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//
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// GPEM (part of PCH NVS) is an object for informing how GPIO groups are mapped to GPE.
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// Mapping for GPP_x is evaluated from (GPEM >> (GroupNumber*2)) & 0x3
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// Possible values for each group:
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// 00b - 2-tier
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// 01b - 1-tier, GPE_DW0
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// 10b - 1-tier, GPE_DW1
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// 11b - 1-tier, GPE_DW2
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//
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//
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// Get GPE number for selected GpioPad
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//
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Method(GGPE, 0x1, NotSerialized)
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{
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//
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// Arg0 - GPIO pad
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//
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//Local0 - GPIO group index (GPP_A - 0, GPP_B - 1 ... )
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Store (GGRP(Arg0), Local0)
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//Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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If (IS_GPIO_GROUP_IN_2_TIER_GPE(Local0)) {
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//
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// Pads mapped to 2-tier GPE will all generate GPE_111
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//
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Return (0x6F)
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} Else {
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//
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// Get mapping for certain group
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// Local2 = (GPEM >> (Local0*2)) & 0x3
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//
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Store(And(ShiftRight(GPEM,Multiply(Local0,2)),0x3),Local2)
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//
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// For 1-tier GPE calculate GPE number
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// GPE number = (Local2 - 1)*32 + Local1
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//
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Return (Add(Multiply(Subtract(Local2,1),32),Local1))
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}
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}
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//
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// Get Pad Configuration DW0 register value
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//
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Method(GPC0, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
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Store(GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,32
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}
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Return(TEMP)
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}
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//
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// Set Pad Configuration DW0 register value
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//
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Method(SPC0, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value for DW0 register
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,32
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}
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Store(Arg1,TEMP)
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}
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//
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// Get Pad Configuration DW1 register value
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//
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Method(GPC1, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE) + 0x4
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Store( Add( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),0x4),Local2)
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OperationRegion(PDW1, SystemMemory, Local2, 4)
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Field(PDW1, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,32
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}
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Return(TEMP)
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}
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//
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// Set Pad Configuration DW1 register value
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//
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Method(SPC1, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value for DW1 register
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local0 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE) + 0x4
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Store( Add( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),0x4),Local2)
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OperationRegion(PDW1, SystemMemory, Local2, 4)
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Field(PDW1, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,32
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}
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Store(Arg1,TEMP)
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}
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//
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// Set RX Override
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//
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Method(SRXO, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - 0=no override, 1=drive RX to 1 internally
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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,28,
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TEMP,1,
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,3
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}
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Store(Arg1,TEMP)
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}
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//
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// Get GPI Input Value
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//
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Method(GGIV, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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, 1,
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TEMP,1,
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, 30
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}
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Return(TEMP)
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}
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//
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// Get GPO Output Value
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//
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Method(GGOV, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,1,
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, 31
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}
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Return(TEMP)
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}
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//
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// Set GPO Output Value
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//
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Method(SGOV, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value of GPIO Tx State
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,1,
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, 31
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}
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Store(Arg1,TEMP)
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}
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//
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// Get GPI Input Invert Bit
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//
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Method(GGII, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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, 23,
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TEMP,1,
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, 8
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}
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Return(TEMP)
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}
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//
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// Set GPI Input Invert Bit
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//
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Method(SGII, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value of RXINV bit for selected pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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, 23,
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TEMP,1,
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, 8
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}
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Store(Arg1,TEMP)
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}
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//
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// Get GPIO Pad Mode
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//
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Method(GPMV, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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, 10,
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TEMP,3,
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, 19
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}
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Return(TEMP)
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}
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|
//
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// Set GPIO Pad Mode
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//
|
Method(SPMV, 0x2, Serialized)
|
{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value for Pad Mode for selected pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
|
, 10,
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TEMP,3,
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, 19
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}
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Store(Arg1,TEMP)
|
}
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|
//
|
// Get GPIO Host Software Pad Ownership
|
//
|
Method(GHPO, 0x1, Serialized)
|
{
|
//
|
// Arg0 - GPIO pad
|
//
|
// Local0 - GPIO group index
|
Store (GGRP(Arg0), Local0)
|
// Local1 - GPIO pad number
|
Store (GNMB(Arg0), Local1)
|
// Local3 - Register offset = HostSwOwnRegOffset + (GpioPadNumber >> 5)*0x4
|
Add (GET_HOSTSW_OWN_REG_ADDRESS(Local0), Multiply (ShiftRight(Local1,5), 0x4), Local3)
|
// Local4 - Pad bit position within register, Local4 = GpioPad & 0x1F = GpioPad % 32
|
And (Local1, 0x1F, Local4)
|
|
OperationRegion(PREG, SystemMemory, Local3, 4)
|
Field(PREG, AnyAcc, NoLock, Preserve) {
|
Offset(0x0),
|
TEMP,32
|
}
|
// HostSwOwnValue = (TEMP >> Local4) & 0x1
|
Return( And( ShiftRight(TEMP,Local4),0x1))
|
}
|
|
//
|
// Set GPIO Host Software Pad Ownership
|
//
|
Method(SHPO, 0x2, Serialized)
|
{
|
//
|
// Arg0 - GPIO pad
|
// Arg1 - Value for GPIO Host Software Pad Ownership
|
//
|
// Local0 - GPIO group index
|
Store (GGRP(Arg0), Local0)
|
// Local1 - GPIO pad number
|
Store (GNMB(Arg0), Local1)
|
// Local3 - Register offset = HostSwOwnRegOffset + (GpioPadNumber >> 5)*0x4
|
Add (GET_HOSTSW_OWN_REG_ADDRESS(Local0), Multiply (ShiftRight(Local1,5), 0x4), Local3)
|
// Local4 - Pad bit position within register, Local4 = GpioPad & 0x1F = GpioPad % 32
|
And (Local1, 0x1F, Local4)
|
|
OperationRegion(PREG, SystemMemory, Local3, 4)
|
Field(PREG, AnyAcc, NoLock, Preserve) {
|
Offset(0x0),
|
TEMP,32
|
}
|
|
If (Arg1) {
|
//TEMP = TEMP | (1 << PadBitPosition)
|
Or(TEMP, ShiftLeft(1,Local4), TEMP)
|
} Else {
|
//TEMP = TEMP & ~(1 << PadBitPosition)
|
And(TEMP, Not(ShiftLeft(1,Local4)),TEMP)
|
}
|
}
|
|
//
|
// Get GPIO Pad Ownership
|
//
|
Method(GGPO, 0x1, Serialized)
|
{
|
//
|
// Arg0 - GPIO pad
|
//
|
// Local0 - GPIO group index
|
Store (GGRP(Arg0), Local0)
|
// Local1 - GPIO pad number
|
Store (GNMB(Arg0), Local1)
|
|
// Local2 = PadOwnAddress + (PadNumber >> 3) * 0x4
|
Store( Add( GET_PAD_OWN_REG_ADDRESS(Local0) , Multiply( ShiftRight(Local1,3),0x4)),Local2)
|
OperationRegion(PREG, SystemMemory, Local2, 4)
|
Field(PREG, AnyAcc, NoLock, Preserve) {
|
Offset(0x0),
|
TEMP,32
|
}
|
// PadOwnValue = (TEMP >> ((Local1 & 0x7) * 4)) & 0x3
|
Return( And( ShiftRight(TEMP,Multiply(And(Local1,0x7),0x4)),0x3))
|
}
|
|
//
|
// Set GPIO GPIRoutIOxAPIC value
|
//
|
Method(SGRA, 0x2, Serialized)
|
{
|
//
|
// Arg0 - GPIO pad
|
// Arg1 - Value for GPIRoutIOxAPIC
|
//
|
// Local0 - GPIO group index
|
Store (GGRP(Arg0), Local0)
|
// Local1 - GPIO pad number
|
Store (GNMB(Arg0), Local1)
|
|
// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
|
Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
|
OperationRegion(PDW0, SystemMemory, Local2, 4)
|
Field(PDW0, AnyAcc, NoLock, Preserve) {
|
Offset(0x0),
|
, 20,
|
TEMP,1,
|
, 11
|
}
|
Store(Arg1,TEMP)
|
}
|
|
//
|
// Set GPIO weak pull-up/down value
|
//
|
Method(SGWP, 0x2, Serialized)
|
{
|
//
|
// Arg0 - GPIO pad
|
// Arg1 - Value for weak pull-up/down
|
//
|
// Local0 - GPIO group index
|
Store (GGRP(Arg0), Local0)
|
// Local1 - GPIO pad number
|
Store (GNMB(Arg0), Local1)
|
|
// Local2 = (GpioCommunityAddress + PadCfgOffset) + 0x4 + (GPIn * PAD_CFG_SIZE)
|
Store( Add( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),0x4),Local2)
|
OperationRegion(PDW0, SystemMemory, Local2, 4)
|
Field(PDW0, AnyAcc, NoLock, Preserve) {
|
Offset(0x0),
|
, 10,
|
TEMP,4,
|
, 18
|
}
|
Store(Arg1,TEMP)
|
}
|
|
//
|
// ISME and CAGS methods are used to properly handle 2-tier GPE
|
// Example:
|
/*
|
Method(_L6F, 0) // Method which is called for all 2-tier GPE, must be within _GPE scope
|
{
|
If (\_SB.ISME(GpioPad))
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{
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\_SB.DeviceXYZ.GPEH() // Custom function to handle GPE for certain GPIO pad
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\_SB.CAGS(GpioPad) // Clear 2-Tier GPE status
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}
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}
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*/
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//
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// @deprecated method, maintained for compatibility
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// Will be removed in future generations
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//
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Method(UGPS, 0x0, Serialized) {
|
|
}
|
|
//
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// Clear all GPE status for 2-tier
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// @deprecated method, maintained for compatibility
|
// Will be removed in future generations
|
//
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Method(CGPS, 0x0, Serialized) {
|
|
}
|
|
//
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// Clear all GPE status for 2-tier which are level sensitive
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// @deprecated method, maintained for compatibility
|
// Will be removed in future generations
|
//
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Method(CGLS, 0x0, Serialized) {
|
|
}
|
|
//
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// Clear a particular GPE status for 2-tier
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//
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Method(CAGS, 0x1, Serialized) {
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local4 - Additional offset to handle cases when GPIO group has more than 32 pads
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Multiply(ShiftRight (Local1,5),4,Local4)
|
|
//Check if 2-tier
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If (IS_GPIO_GROUP_IN_2_TIER_GPE(Local0)) {
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//Get GPI_GPE_STS for GPP_x
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OperationRegion(GPPX, SystemMemory, Add(GET_GPE_STS_REG_ADDRESS(Local0),Local4), 4)
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Field(GPPX, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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STSX,32,
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}
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// Local2 - GpioPad bit mask within register
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ShiftLeft(1, Mod(Local1,32), Local2)
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// Clear GPIO status by writing 1b for a pad
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Store(Local2, STSX)
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}
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}
|
|
//
|
// Check if GPIO pad was source of 2-Tier GPE event
|
//
|
Method(ISME, 0x1, NotSerialized) {
|
//
|
// Arg0 - GPIO pad
|
//
|
If (LNot(IS_GPIO_GROUP_IN_2_TIER_GPE(Arg0))) {
|
Return(0)
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}
|
|
// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 - Register offset = GpeStsRegOffset + (GpioPadNumber >> 5)*0x4
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Add (GET_GPE_STS_REG_ADDRESS(Local0), Multiply (ShiftRight(Local1,5), 0x4), Local2)
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// Local3 - Pad bit position within register, Local3 = GpioPad & 0x1F = GpioPad % 32
|
And (Local1, 0x1F, Local3)
|
|
OperationRegion(GPPX, SystemMemory, Local2, 0x24)
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Field(GPPX, AnyAcc, NoLock, Preserve) {
|
Offset(0x0),
|
STSX,32,
|
Offset(0x20),
|
GENX,32
|
}
|
|
//Return result of GPI_GPE_EN&GPI_GPE_STS for this pad
|
Return(And(ShiftRight(And(STSX,GENX),Local3),0x1))
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}
|
|
//
|
// Do Interrupt Pin Isolation
|
// This method should be called before power gating external device
|
// which uses Gpio pad as an interrupt
|
//
|
Method(DIPI, 0x1, Serialized) {
|
//
|
// Arg0 - GPIO pad
|
//
|
// Local0 - GPIO group index
|
Store (GGRP(Arg0), Local0)
|
// Local1 - GPIO pad number
|
Store (GNMB(Arg0), Local1)
|
|
// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
|
Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
|
OperationRegion(PDW0, SystemMemory, Local2, 4)
|
Field(PDW0, AnyAcc, NoLock, Preserve) {
|
Offset(0x0),
|
, 9,
|
RDIS,1,
|
, 15,
|
RCFG,2,
|
, 5
|
}
|
If(LNotEqual(RCFG,2)) {
|
// Save RxEvCfg state in RXEV object:
|
// RXEV[GroupIndex][PadNumber] = RCFG
|
Store(RCFG, Index( DeRefOf(Index(RXEV,Local0)), Local1))
|
// Set RxEvCfg to 2
|
Store(2,RCFG)
|
// Set GPIORxDis to 1
|
Store(1,RDIS)
|
}
|
}
|
|
//
|
// Undo Interrupt Pin Isolation
|
// This method should be called after un-power gating external device
|
// which uses Gpio pad as an interrupt
|
//
|
Method(UIPI, 0x1, Serialized) {
|
//
|
// Arg0 - GPIO pad
|
//
|
// Local0 - GPIO group index
|
Store (GGRP(Arg0), Local0)
|
// Local1 - GPIO pad number
|
Store (GNMB(Arg0), Local1)
|
|
// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * PAD_CFG_SIZE)
|
Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
|
OperationRegion(PDW0, SystemMemory, Local2, 4)
|
Field(PDW0, AnyAcc, NoLock, Preserve) {
|
Offset(0x0),
|
, 9,
|
RDIS,1,
|
, 15,
|
RCFG,2,
|
, 5
|
}
|
// Get RxEvCfg original value from RXEV object
|
// Local3 = RXEV[GroupIndex][PadNumber]
|
Store( DeRefOf(Index( DeRefOf(Index (RXEV, Local0)), Local1)), Local3)
|
|
If(LNotEqual(Local3,2)) {
|
// Set GPIORxDis to 0
|
Store(0,RDIS)
|
// Set RxEvCfg to original value
|
Store(Local3,RCFG)
|
}
|
}
|
|
} // \_SB Scope
|
|
|
