/** @file
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Implementation of Fsp PCH Policy Initialization.
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PeiFspPolicyInitLib.h>
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#include <Ppi/SiPolicy.h>
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#include <CpuAccess.h>
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#include <Library/HobLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/ConfigBlockLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PeiServicesLib.h>
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#include <FspEas.h>
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/**
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Performs FSP CPU PEI Policy initialization.
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@param[in][out] FspmUpd Pointer to FSP UPD Data.
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@retval EFI_SUCCESS FSP UPD Data is updated.
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@retval EFI_NOT_FOUND Fail to locate required PPI.
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@retval Other FSP UPD Data update process fail.
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**/
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EFI_STATUS
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EFIAPI
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PeiFspCpuPolicyInitPreMem (
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IN OUT FSPM_UPD *FspmUpd
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)
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{
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EFI_STATUS Status;
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SI_PREMEM_POLICY_PPI *SiPreMemPolicyPpi;
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CPU_OVERCLOCKING_PREMEM_CONFIG *CpuOverClockingPreMemConfig;
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CPU_CONFIG_LIB_PREMEM_CONFIG *CpuConfigLibPreMemConfig;
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DEBUG ((DEBUG_INFO | DEBUG_INIT, "FSP Update SiCpuPolicy Pre-Mem Start\n"));
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//
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// Locate SiPreMemPolicyPpi
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//
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SiPreMemPolicyPpi = NULL;
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Status = PeiServicesLocatePpi (
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&gSiPreMemPolicyPpiGuid,
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0,
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NULL,
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(VOID **) &SiPreMemPolicyPpi
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);
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if (EFI_ERROR (Status)) {
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return EFI_NOT_FOUND;
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}
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Status = GetConfigBlock ((VOID *) SiPreMemPolicyPpi, &gCpuOverclockingPreMemConfigGuid, (VOID *) &CpuOverClockingPreMemConfig);
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ASSERT_EFI_ERROR (Status);
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Status = GetConfigBlock ((VOID *) SiPreMemPolicyPpi, &gCpuConfigLibPreMemConfigGuid, (VOID *) &CpuConfigLibPreMemConfig);
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ASSERT_EFI_ERROR (Status);
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///
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///Test RC Policies
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///
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///
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///
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DEBUG ((DEBUG_INFO | DEBUG_INIT, "FSP Update SiCpuPolicy Pre-Mem End\n"));
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//
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// Overclocking PreMem policies
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//
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FspmUpd->FspmConfig.OcSupport = (UINT8) CpuOverClockingPreMemConfig->OcSupport;
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FspmUpd->FspmConfig.OcLock = (UINT8) CpuOverClockingPreMemConfig->OcLock;
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FspmUpd->FspmConfig.CoreMaxOcRatio = (UINT8) CpuOverClockingPreMemConfig->CoreMaxOcRatio;
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FspmUpd->FspmConfig.CoreVoltageMode = (UINT8) CpuOverClockingPreMemConfig->CoreVoltageMode;
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FspmUpd->FspmConfig.RingMinOcRatio = (UINT8) CpuOverClockingPreMemConfig->RingMinOcRatio;
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FspmUpd->FspmConfig.RingMaxOcRatio = (UINT8) CpuOverClockingPreMemConfig->RingMaxOcRatio;
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FspmUpd->FspmConfig.CoreVoltageOverride = (UINT16) CpuOverClockingPreMemConfig->CoreVoltageOverride;
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FspmUpd->FspmConfig.CoreVoltageAdaptive = (UINT16) CpuOverClockingPreMemConfig->CoreVoltageAdaptive;
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FspmUpd->FspmConfig.CoreVoltageOffset = (UINT16) CpuOverClockingPreMemConfig->CoreVoltageOffset;
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FspmUpd->FspmConfig.CorePllVoltageOffset = (UINT8) CpuOverClockingPreMemConfig->CorePllVoltageOffset;
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FspmUpd->FspmConfig.GtPllVoltageOffset = (UINT8) CpuOverClockingPreMemConfig->GtPllVoltageOffset;
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FspmUpd->FspmConfig.RingPllVoltageOffset = (UINT8) CpuOverClockingPreMemConfig->RingPllVoltageOffset;
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FspmUpd->FspmConfig.SaPllVoltageOffset = (UINT8) CpuOverClockingPreMemConfig->SaPllVoltageOffset;
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FspmUpd->FspmConfig.McPllVoltageOffset = (UINT8) CpuOverClockingPreMemConfig->McPllVoltageOffset;
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FspmUpd->FspmConfig.Avx2RatioOffset = (UINT8) CpuOverClockingPreMemConfig->Avx2RatioOffset;
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FspmUpd->FspmConfig.BclkAdaptiveVoltage = (UINT8) CpuOverClockingPreMemConfig->BclkAdaptiveVoltage;
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//
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// Cpu Config Lib policies
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//
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FspmUpd->FspmConfig.HyperThreading = (UINT8) CpuConfigLibPreMemConfig->HyperThreading;
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FspmUpd->FspmConfig.BootFrequency = (UINT8) CpuConfigLibPreMemConfig->BootFrequency;
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FspmUpd->FspmConfig.ActiveCoreCount = (UINT8) CpuConfigLibPreMemConfig->ActiveCoreCount;
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FspmUpd->FspmConfig.JtagC10PowerGateDisable = (UINT8) CpuConfigLibPreMemConfig->JtagC10PowerGateDisable;
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FspmUpd->FspmConfig.FClkFrequency = (UINT8) CpuConfigLibPreMemConfig->FClkFrequency;
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FspmUpd->FspmConfig.BistOnReset = (UINT8) CpuConfigLibPreMemConfig->BistOnReset;
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FspmUpd->FspmConfig.VmxEnable = (UINT8) CpuConfigLibPreMemConfig->VmxEnable;
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FspmUpd->FspmConfig.CpuRatioOverride = (UINT8) CpuConfigLibPreMemConfig->CpuRatioOverride;
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FspmUpd->FspmConfig.CpuRatio = (UINT8) CpuConfigLibPreMemConfig->CpuRatio;
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FspmUpd->FspmConfig.PeciSxReset = (UINT8) CpuConfigLibPreMemConfig->PeciSxReset;
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FspmUpd->FspmConfig.PeciC10Reset = (UINT8) CpuConfigLibPreMemConfig->PeciC10Reset;
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return EFI_SUCCESS;
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}
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/**
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This routine is used to search SMRAM and get SmramCpuData point.
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@retval SmramCpuData - The pointer of CPU information in SMRAM.
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@retval NULL - Unable to find the CPU information.
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**/
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STATIC
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SMRAM_CPU_DATA *
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GetSmmCpuData(
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VOID
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)
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{
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UINT32 Address;
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SMRAM_CPU_DATA *SmramCpuData;
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EFI_PEI_HOB_POINTERS Hob;
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EFI_STATUS Status;
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UINT32 TsegBase = 0;
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UINT32 TsegSize = 0;
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//
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// Find TSEG Base using Fsp Resource Descriptor
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//
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Status = PeiServicesGetHobList ((VOID **) &Hob.Raw);
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while (!END_OF_HOB_LIST (Hob)) {
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if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
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if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED)
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&& (Hob.ResourceDescriptor->PhysicalStart >= BASE_1MB)
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&& (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength <= BASE_4GB)
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&& (CompareGuid (&Hob.ResourceDescriptor->Owner, &gFspReservedMemoryResourceHobTsegGuid))) {
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TsegBase = (UINT32)Hob.ResourceDescriptor->PhysicalStart;
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TsegSize = (UINT32)Hob.ResourceDescriptor->ResourceLength;
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DEBUG((DEBUG_INFO, "Found gFspReservedMemoryResourceHobTsegGuid\n"));
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break;
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}
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}
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Hob.Raw = GET_NEXT_HOB (Hob);
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}
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///
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/// Search SMRAM on page alignment for the SMMNVS signature
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///
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if(TsegBase && TsegSize ){
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for (Address = (TsegBase + TsegSize - EFI_PAGE_SIZE); Address >= TsegBase; Address -= EFI_PAGE_SIZE ) {
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SmramCpuData = (SMRAM_CPU_DATA *) (UINTN) Address;
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if (CompareGuid(&SmramCpuData->HeaderGuid, &gSmramCpuDataHeaderGuid)) {
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return SmramCpuData;
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}
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}
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}
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DEBUG((DEBUG_WARN, "SmramCpuData not found\n"));
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return NULL;
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}
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/**
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Performs FSP CPU PEI Policy post memory initialization.
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@param[in][out] FspsUpd Pointer to FSP UPD Data.
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@retval EFI_SUCCESS FSP UPD Data is updated.
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@retval EFI_NOT_FOUND Fail to locate required PPI.
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@retval Other FSP UPD Data update process fail.
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**/
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EFI_STATUS
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EFIAPI
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PeiFspCpuPolicyInit (
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IN OUT FSPS_UPD *FspsUpd
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)
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{
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EFI_STATUS Status;
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SI_POLICY_PPI *SiPolicyPpi;
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CPU_CONFIG *CpuConfig;
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CPU_POWER_MGMT_BASIC_CONFIG *CpuPowerMgmtBasicConfig;
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CPU_POWER_MGMT_CUSTOM_CONFIG *CpuPowerMgmtCustomConfig;
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CPU_TEST_CONFIG *CpuTestConfig;
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CPU_POWER_MGMT_TEST_CONFIG *CpuPowerMgmtTestConfig;
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UINTN Index;
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SMRAM_CPU_DATA *SmramCpuData;
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UINT32 S3BspMtrrTablePointer;
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UINT32 CpuS3ResumeDataPointer;
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EFI_BOOT_MODE BootMode;
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DEBUG ((DEBUG_INFO | DEBUG_INIT, "FSP Update SiCpuPolicy\n"));
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//
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// Locate gSiPolicyPpiGuid
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//
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SiPolicyPpi = NULL;
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Status = PeiServicesLocatePpi (
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&gSiPolicyPpiGuid,
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0,
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NULL,
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(VOID **) &SiPolicyPpi
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);
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if (EFI_ERROR (Status)) {
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return EFI_NOT_FOUND;
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}
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Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gCpuConfigGuid, (VOID *) &CpuConfig);
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ASSERT_EFI_ERROR (Status);
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Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gCpuPowerMgmtBasicConfigGuid, (VOID *) &CpuPowerMgmtBasicConfig);
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ASSERT_EFI_ERROR (Status);
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Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gCpuPowerMgmtCustomConfigGuid, (VOID *) &CpuPowerMgmtCustomConfig);
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ASSERT_EFI_ERROR (Status);
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Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gCpuTestConfigGuid, (VOID *) &CpuTestConfig);
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ASSERT_EFI_ERROR (Status);
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Status = GetConfigBlock ((VOID *) SiPolicyPpi, &gCpuPowerMgmtTestConfigGuid, (VOID *) &CpuPowerMgmtTestConfig);
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ASSERT_EFI_ERROR (Status);
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//
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// Production RC Policies
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//
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CopyMem ((VOID *)&(FspsUpd->FspsConfig.CpuConfig), (VOID *)&(((CPU_CONFIG_UNION *)CpuConfig)->CpuConfigFsp.Data), sizeof (UINT32));
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FspsUpd->FspsConfig.MicrocodePatchAddress = CpuConfig->MicrocodePatchAddress;
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FspsUpd->FspsConfig.TurboMode = (UINT8) CpuPowerMgmtBasicConfig->TurboMode;
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///
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///Test RC Policies
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///
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FspsUpd->FspsTestConfig.MlcStreamerPrefetcher = (UINT8) CpuTestConfig->MlcStreamerPrefetcher;
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FspsUpd->FspsTestConfig.MlcSpatialPrefetcher = (UINT8) CpuTestConfig->MlcSpatialPrefetcher;
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FspsUpd->FspsTestConfig.MonitorMwaitEnable = (UINT8) CpuTestConfig->MonitorMwaitEnable;
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FspsUpd->FspsTestConfig.DebugInterfaceEnable = (UINT8) CpuTestConfig->DebugInterfaceEnable;
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FspsUpd->FspsTestConfig.DebugInterfaceLockEnable = (UINT8) CpuTestConfig->DebugInterfaceLockEnable;
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FspsUpd->FspsTestConfig.ApIdleManner = (UINT8) CpuTestConfig->ApIdleManner;
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FspsUpd->FspsTestConfig.ApHandoffManner = (UINT8) CpuTestConfig->ApHandoffManner;
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FspsUpd->FspsTestConfig.ProcTraceOutputScheme = (UINT8) CpuTestConfig->ProcTraceOutputScheme;
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FspsUpd->FspsTestConfig.ProcTraceEnable = (UINT8) CpuTestConfig->ProcTraceEnable;
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FspsUpd->FspsTestConfig.ProcTraceMemSize = (UINT8) CpuTestConfig->ProcTraceMemSize;
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FspsUpd->FspsTestConfig.VoltageOptimization = (UINT8) CpuTestConfig->VoltageOptimization;
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FspsUpd->FspsTestConfig.OneCoreRatioLimit = (UINT8) CpuPowerMgmtBasicConfig->OneCoreRatioLimit;
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FspsUpd->FspsTestConfig.TwoCoreRatioLimit = (UINT8) CpuPowerMgmtBasicConfig->TwoCoreRatioLimit;
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FspsUpd->FspsTestConfig.ThreeCoreRatioLimit = (UINT8) CpuPowerMgmtBasicConfig->ThreeCoreRatioLimit;
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FspsUpd->FspsTestConfig.FourCoreRatioLimit = (UINT8) CpuPowerMgmtBasicConfig->FourCoreRatioLimit;
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FspsUpd->FspsTestConfig.FiveCoreRatioLimit = (UINT8) CpuPowerMgmtBasicConfig->FiveCoreRatioLimit;
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FspsUpd->FspsTestConfig.SixCoreRatioLimit = (UINT8) CpuPowerMgmtBasicConfig->SixCoreRatioLimit;
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FspsUpd->FspsTestConfig.SevenCoreRatioLimit = (UINT8) CpuPowerMgmtBasicConfig->SevenCoreRatioLimit;
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FspsUpd->FspsTestConfig.EightCoreRatioLimit = (UINT8) CpuPowerMgmtBasicConfig->EightCoreRatioLimit;
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FspsUpd->FspsTestConfig.Hwp = (UINT8) CpuPowerMgmtBasicConfig->Hwp;
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FspsUpd->FspsTestConfig.HdcControl = (UINT8) CpuPowerMgmtBasicConfig->HdcControl;
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FspsUpd->FspsTestConfig.PowerLimit1Time = (UINT8) CpuPowerMgmtBasicConfig->PowerLimit1Time;
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FspsUpd->FspsTestConfig.PowerLimit2 = (UINT8) CpuPowerMgmtBasicConfig->PowerLimit2;
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FspsUpd->FspsTestConfig.TurboPowerLimitLock = (UINT8) CpuPowerMgmtBasicConfig->TurboPowerLimitLock;
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FspsUpd->FspsTestConfig.PowerLimit3Time = (UINT8) CpuPowerMgmtBasicConfig->PowerLimit3Time;
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FspsUpd->FspsTestConfig.PowerLimit3DutyCycle = (UINT8) CpuPowerMgmtBasicConfig->PowerLimit3DutyCycle;
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FspsUpd->FspsTestConfig.PowerLimit3Lock = (UINT8) CpuPowerMgmtBasicConfig->PowerLimit3Lock;
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FspsUpd->FspsTestConfig.PowerLimit4Lock = (UINT8) CpuPowerMgmtBasicConfig->PowerLimit4Lock;
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FspsUpd->FspsTestConfig.TccActivationOffset = (UINT8) CpuPowerMgmtBasicConfig->TccActivationOffset;
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FspsUpd->FspsTestConfig.TccOffsetClamp = (UINT8) CpuPowerMgmtBasicConfig->TccOffsetClamp;
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FspsUpd->FspsTestConfig.TccOffsetLock = (UINT8) CpuPowerMgmtBasicConfig->TccOffsetLock;
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FspsUpd->FspsTestConfig.PowerLimit1 = (UINT32) (CpuPowerMgmtBasicConfig->PowerLimit1 * 125);
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FspsUpd->FspsTestConfig.PowerLimit2Power = (UINT32) (CpuPowerMgmtBasicConfig->PowerLimit2Power * 125);
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FspsUpd->FspsTestConfig.PowerLimit3 = (UINT32) (CpuPowerMgmtBasicConfig->PowerLimit3 * 125);
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FspsUpd->FspsTestConfig.PowerLimit4 = (UINT32) (CpuPowerMgmtBasicConfig->PowerLimit4 * 125);
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FspsUpd->FspsTestConfig.TccOffsetTimeWindowForRatl = (UINT32) CpuPowerMgmtBasicConfig->TccOffsetTimeWindowForRatl;
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FspsUpd->FspsTestConfig.NumberOfEntries = (UINT8) CpuPowerMgmtCustomConfig->CustomRatioTable.NumberOfEntries;
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FspsUpd->FspsTestConfig.Custom1PowerLimit1Time = (UINT8) CpuPowerMgmtCustomConfig->CustomConfigTdpTable[0].CustomPowerLimit1Time;
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FspsUpd->FspsTestConfig.Custom2PowerLimit1Time = (UINT8) CpuPowerMgmtCustomConfig->CustomConfigTdpTable[1].CustomPowerLimit1Time;
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FspsUpd->FspsTestConfig.Custom3PowerLimit1Time = (UINT8) CpuPowerMgmtCustomConfig->CustomConfigTdpTable[2].CustomPowerLimit1Time;
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FspsUpd->FspsTestConfig.Custom1TurboActivationRatio = (UINT8) CpuPowerMgmtCustomConfig->CustomConfigTdpTable[0].CustomTurboActivationRatio;
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FspsUpd->FspsTestConfig.Custom2TurboActivationRatio = (UINT8) CpuPowerMgmtCustomConfig->CustomConfigTdpTable[1].CustomTurboActivationRatio;
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FspsUpd->FspsTestConfig.Custom3TurboActivationRatio = (UINT8) CpuPowerMgmtCustomConfig->CustomConfigTdpTable[2].CustomTurboActivationRatio;
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FspsUpd->FspsTestConfig.ConfigTdpLock = (UINT8) CpuPowerMgmtCustomConfig->ConfigTdpLock;
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FspsUpd->FspsTestConfig.ConfigTdpBios = (UINT8) CpuPowerMgmtCustomConfig->ConfigTdpBios;
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FspsUpd->FspsTestConfig.MaxRatio = (UINT16) CpuPowerMgmtCustomConfig->CustomRatioTable.MaxRatio;
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for (Index = 0; Index < CpuPowerMgmtCustomConfig->CustomRatioTable.NumberOfEntries; Index++) {
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FspsUpd->FspsTestConfig.StateRatio[Index] = (UINT16) CpuPowerMgmtCustomConfig->CustomRatioTable.StateRatio[Index];
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}
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FspsUpd->FspsTestConfig.Custom1PowerLimit1 = (UINT32) (CpuPowerMgmtCustomConfig->CustomConfigTdpTable[0].CustomPowerLimit1 * 125);
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FspsUpd->FspsTestConfig.Custom1PowerLimit2 = (UINT32) (CpuPowerMgmtCustomConfig->CustomConfigTdpTable[0].CustomPowerLimit2 * 125);
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FspsUpd->FspsTestConfig.Custom2PowerLimit1 = (UINT32) (CpuPowerMgmtCustomConfig->CustomConfigTdpTable[1].CustomPowerLimit1 * 125);
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FspsUpd->FspsTestConfig.Custom2PowerLimit2 = (UINT32) (CpuPowerMgmtCustomConfig->CustomConfigTdpTable[1].CustomPowerLimit2 * 125);
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FspsUpd->FspsTestConfig.Custom3PowerLimit1 = (UINT32) (CpuPowerMgmtCustomConfig->CustomConfigTdpTable[2].CustomPowerLimit1 * 125);
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FspsUpd->FspsTestConfig.Custom3PowerLimit2 = (UINT32) (CpuPowerMgmtCustomConfig->CustomConfigTdpTable[2].CustomPowerLimit2 * 125);
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FspsUpd->FspsTestConfig.Eist = (UINT8) CpuPowerMgmtTestConfig->Eist;
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FspsUpd->FspsTestConfig.EnergyEfficientPState = (UINT8) CpuPowerMgmtTestConfig->EnergyEfficientPState;
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FspsUpd->FspsTestConfig.EnergyEfficientTurbo = (UINT8) CpuPowerMgmtTestConfig->EnergyEfficientTurbo;
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FspsUpd->FspsTestConfig.TStates = (UINT8) CpuPowerMgmtTestConfig->TStates;
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FspsUpd->FspsTestConfig.BiProcHot = (UINT8) CpuPowerMgmtTestConfig->BiProcHot;
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FspsUpd->FspsTestConfig.DisableProcHotOut = (UINT8) CpuPowerMgmtTestConfig->DisableProcHotOut;
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FspsUpd->FspsTestConfig.ProcHotResponse = (UINT8) CpuPowerMgmtTestConfig->ProcHotResponse;
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FspsUpd->FspsTestConfig.DisableVrThermalAlert = (UINT8) CpuPowerMgmtTestConfig->DisableVrThermalAlert;
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FspsUpd->FspsTestConfig.AutoThermalReporting = (UINT8) CpuPowerMgmtTestConfig->AutoThermalReporting;
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FspsUpd->FspsTestConfig.ThermalMonitor = (UINT8) CpuPowerMgmtTestConfig->ThermalMonitor;
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FspsUpd->FspsTestConfig.Cx = (UINT8) CpuPowerMgmtTestConfig->Cx;
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FspsUpd->FspsTestConfig.PmgCstCfgCtrlLock = (UINT8) CpuPowerMgmtTestConfig->PmgCstCfgCtrlLock;
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FspsUpd->FspsTestConfig.C1e = (UINT8) CpuPowerMgmtTestConfig->C1e;
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FspsUpd->FspsTestConfig.PkgCStateDemotion = (UINT8) CpuPowerMgmtTestConfig->PkgCStateDemotion;
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FspsUpd->FspsTestConfig.PkgCStateUnDemotion = (UINT8) CpuPowerMgmtTestConfig->PkgCStateUnDemotion;
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FspsUpd->FspsTestConfig.CStatePreWake = (UINT8) CpuPowerMgmtTestConfig->CStatePreWake;
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FspsUpd->FspsTestConfig.TimedMwait = (UINT8) CpuPowerMgmtTestConfig->TimedMwait;
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FspsUpd->FspsTestConfig.CstCfgCtrIoMwaitRedirection = (UINT8) CpuPowerMgmtTestConfig->CstCfgCtrIoMwaitRedirection;
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FspsUpd->FspsTestConfig.PkgCStateLimit = (UINT8) CpuPowerMgmtTestConfig->PkgCStateLimit;
|
FspsUpd->FspsTestConfig.CstateLatencyControl0TimeUnit = (UINT8) CpuPowerMgmtTestConfig->CstateLatencyControl0TimeUnit;
|
FspsUpd->FspsTestConfig.CstateLatencyControl1TimeUnit = (UINT8) CpuPowerMgmtTestConfig->CstateLatencyControl1TimeUnit;
|
FspsUpd->FspsTestConfig.CstateLatencyControl2TimeUnit = (UINT8) CpuPowerMgmtTestConfig->CstateLatencyControl2TimeUnit;
|
FspsUpd->FspsTestConfig.CstateLatencyControl3TimeUnit = (UINT8) CpuPowerMgmtTestConfig->CstateLatencyControl3TimeUnit;
|
FspsUpd->FspsTestConfig.CstateLatencyControl4TimeUnit = (UINT8) CpuPowerMgmtTestConfig->CstateLatencyControl4TimeUnit;
|
FspsUpd->FspsTestConfig.CstateLatencyControl5TimeUnit = (UINT8) CpuPowerMgmtTestConfig->CstateLatencyControl5TimeUnit;
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FspsUpd->FspsTestConfig.PpmIrmSetting = (UINT8) CpuPowerMgmtTestConfig->PpmIrmSetting;
|
FspsUpd->FspsTestConfig.ProcHotLock = (UINT8) CpuPowerMgmtTestConfig->ProcHotLock;
|
FspsUpd->FspsTestConfig.RaceToHalt = (UINT8) CpuPowerMgmtTestConfig->RaceToHalt;
|
FspsUpd->FspsTestConfig.ConfigTdpLevel = (UINT8) CpuPowerMgmtTestConfig->ConfigTdpLevel;
|
FspsUpd->FspsTestConfig.CstateLatencyControl0Irtl = (UINT16) CpuPowerMgmtTestConfig->CstateLatencyControl0Irtl;
|
FspsUpd->FspsTestConfig.CstateLatencyControl1Irtl = (UINT16) CpuPowerMgmtTestConfig->CstateLatencyControl1Irtl;
|
FspsUpd->FspsTestConfig.CstateLatencyControl2Irtl = (UINT16) CpuPowerMgmtTestConfig->CstateLatencyControl2Irtl;
|
FspsUpd->FspsTestConfig.CstateLatencyControl3Irtl = (UINT16) CpuPowerMgmtTestConfig->CstateLatencyControl3Irtl;
|
FspsUpd->FspsTestConfig.CstateLatencyControl4Irtl = (UINT16) CpuPowerMgmtTestConfig->CstateLatencyControl4Irtl;
|
FspsUpd->FspsTestConfig.CstateLatencyControl5Irtl = (UINT16) CpuPowerMgmtTestConfig->CstateLatencyControl5Irtl;
|
|
Status = PeiServicesGetBootMode(&BootMode);
|
if ((Status == EFI_SUCCESS) && (BootMode == BOOT_ON_S3_RESUME)) {
|
SmramCpuData = GetSmmCpuData();
|
if (SmramCpuData != NULL) {
|
S3BspMtrrTablePointer = (UINT32) AllocateZeroPool(SmramCpuData->S3BspMtrrTableSize); //Add Null terminator
|
FspsUpd->FspsConfig.CpuS3ResumeMtrrData = S3BspMtrrTablePointer;
|
FspsUpd->FspsConfig.CpuS3ResumeMtrrDataSize = (UINT16) SmramCpuData->S3BspMtrrTableSize;
|
//
|
// Copy BSP MTRR table to UPD.
|
//
|
CopyMem((VOID*) S3BspMtrrTablePointer,
|
(UINT8 *) SmramCpuData + SmramCpuData->S3BspMtrrTableOffset,
|
SmramCpuData->S3BspMtrrTableSize);
|
|
CpuS3ResumeDataPointer = (UINT32) AllocateZeroPool(SmramCpuData->CpuPrivateDataSize);
|
FspsUpd->FspsTestConfig.CpuS3ResumeData = CpuS3ResumeDataPointer;
|
FspsUpd->FspsTestConfig.CpuS3ResumeDataSize = (UINT16) SmramCpuData->CpuPrivateDataSize;
|
//
|
// Copy CPU_PRIVATE_DATA to UPD.
|
//
|
CopyMem((VOID*) CpuS3ResumeDataPointer,
|
(UINT8 *) SmramCpuData + SmramCpuData->CpuPrivateDataOffset,
|
SmramCpuData->CpuPrivateDataSize);
|
} else {
|
//@todo Check if an assert can be handled cleanly
|
DEBUG((DEBUG_WARN, "Unable to initialize S3 data\n"));
|
}
|
|
}
|
///
|
///
|
return EFI_SUCCESS;
|
}
|
