/** @file
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This file contains the tests for the BootFirmwareMediaProtection BIT
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "HstiSiliconDxe.h"
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#define B_PCH_SPI_FMRWA_MASK 0xFFF00000
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#define B_PCH_SPI_FMRRA_MASK 0x000FFF00
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/**
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Run tests for BootFirmwareMediaProtection bit
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**/
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VOID
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CheckBootFirmwareMediaProtection (
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VOID
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)
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{
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EFI_STATUS Status;
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BOOLEAN Result;
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UINT16 PmBase;
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UINT8 BiosControl;
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UINT16 Hsfs;
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UINT32 Cpptv;
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UINT32 Frap;
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UINT8 Data8;
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UINT32 Data32;
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CHAR16 *HstiErrorString;
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UINT32 PchSpiBar0;
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UINT8 PcrDmi;
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if ((mFeatureImplemented[0] & HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION) == 0) {
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return;
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}
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Result = TRUE;
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PchAcpiBaseGet (&PmBase);
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PchSpiBar0 = MmioRead32 (MmPciBase (DEFAULT_PCI_BUS_NUMBER_PCH,PCI_DEVICE_NUMBER_PCH_SPI,PCI_FUNCTION_NUMBER_PCH_SPI) + R_PCH_SPI_BAR0) & ~B_PCH_SPI_BAR0_MASK;
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DEBUG ((DEBUG_INFO, " Table 3-5. SPI Flash and BIOS Security Configuration\n"));
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DEBUG ((DEBUG_INFO, " 1. BIOS write-protection\n"));
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BiosControl = MmioRead8 (MmPciBase (DEFAULT_PCI_BUS_NUMBER_PCH,PCI_DEVICE_NUMBER_PCH_LPC,PCI_FUNCTION_NUMBER_PCH_SPI) + R_PCH_SPI_BC);
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if (((BiosControl & B_PCH_SPI_BC_LE) == 0) ||
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((BiosControl & B_PCH_SPI_BC_WPD) != 0) ||
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((BiosControl & B_PCH_SPI_BC_EISS) == 0)) {
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_1 ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_1);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 2. SPI flash descriptor security override pin-strap\n"));
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Hsfs = MmioRead16 (PchSpiBar0 + R_PCH_SPI_HSFSC);
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if ((Hsfs & B_PCH_SPI_HSFSC_FDOPSS) == 0) {
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_2 ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_2);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 3. SPI controller configuration is locked\n"));
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if ((Hsfs & B_PCH_SPI_HSFSC_FLOCKDN) == 0) {
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_3 ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_3);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 4. BIOS Interface Lock\n"));
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PcrDmi = MmioRead8 (PCH_PCR_ADDRESS (PID_DMI,R_PCH_PCR_DMI_GCS));
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if (((PcrDmi & BIT0) == 0x0) ||
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((BiosControl & BIT7) == 0x0)) {
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DEBUG ((DEBUG_INFO, "PcrDmi %x or BILD[7] %x not set\n",PcrDmi,BiosControl));
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_4 ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_4);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 5. BIOS Top Swap Mode\n"));
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if ((BiosControl & B_PCH_SPI_BC_TSS) != 0) {
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_5 ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_5);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 6. Component Property Parameter Table Valid\n"));
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Cpptv = MmioRead32 (PchSpiBar0 + R_PCH_SPI_SFDP0_VSCC0);
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if ((Cpptv & B_PCH_SPI_SFDPX_VSCCX_CPPTV) == 0) {
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_6 ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_6);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 7. Component Property Parameter Table Valid, Secondary Flash Part\n"));
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Data32 = 0;
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Data32 = Data32 | 0x14;
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MmioWrite32 (PchSpiBar0 + R_PCH_SPI_FDOC, Data32);
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Data32 = MmioRead32 (PchSpiBar0 + R_PCH_SPI_FDOD);
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Cpptv = MmioRead32 (PchSpiBar0 + R_PCH_SPI_SFDP1_VSCC1);
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//
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// If Second part is present the verify CPPTV is set, otherwise if not present verify that it's clear
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//
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if ((Data32 & BIT8) != 0) {
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if ((Cpptv & B_PCH_SPI_SFDPX_VSCCX_CPPTV) == 0) {
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_6 ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_6);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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} else {
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if ((Cpptv & B_PCH_SPI_SFDPX_VSCCX_CPPTV) == B_PCH_SPI_SFDPX_VSCCX_CPPTV) {
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_6 ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_6);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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}
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DEBUG ((DEBUG_INFO, " 8. ME Firmware Status\n"));
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Data8 = MmioRead8 (MmPciBase (DEFAULT_PCI_BUS_NUMBER_PCH,ME_DEVICE_NUMBER,HECI_FUNCTION_NUMBER) + 0x40);
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if ((Data8 & 0xF) != 0x5) {
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_8 ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_8);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 9. BIOS Flash Descriptor Valid\n"));
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if ((Hsfs & B_PCH_SPI_HSFSC_FDV) == 0) {
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_9 ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_9);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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Data32 = 0;
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Data32 = Data32 | V_PCH_SPI_FDOC_FDSS_MSTR | 0x0;
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MmioWrite32 (PchSpiBar0 + R_PCH_SPI_FDOC, Data32);
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Data32 = MmioRead32 (PchSpiBar0 + R_PCH_SPI_FDOD);
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DEBUG ((DEBUG_INFO, " 11. BIOS Region Flash Write Access\n"));
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///
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/// Descriptor Master Access Read: BIT 8
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/// Bios Master Access Read: BIT 9
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/// CSE Master Access Read: BIT 10
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/// GBE Master Access Read: BIT 11
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/// PDR Master Access Read: BIT 12
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/// EC Master Access Read: BIT 16
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/// Descriptor Master Access Write: BIT 20
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/// Bios Master Access Write: BIT 21
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/// CSE Master Access Write: BIT 22
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/// GBE Master Access Write: BIT 23
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/// PDR Master Access Write: BIT 24
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/// EC Master Access Write: BIT 28
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///
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if (((Data32 & B_PCH_SPI_FMRWA_MASK) != 0x00A00000) &&
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((Data32 & B_PCH_SPI_FMRWA_MASK) != 0x01A00000) &&
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((Data32 & B_PCH_SPI_FMRWA_MASK) != 0x10A00000) &&
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((Data32 & B_PCH_SPI_FMRWA_MASK) != 0x11A00000)) {
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DEBUG ((DEBUG_INFO, "Bios Region Master Write Access 0x%x\n",(Data32 & B_PCH_SPI_FMRWA_MASK)));
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_A ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_A);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 12. BIOS Region Flash Read Access\n"));
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if (((Data32 & B_PCH_SPI_FMRRA_MASK) != 0x00000F00) &&
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((Data32 & B_PCH_SPI_FMRRA_MASK) != 0x00001F00) &&
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((Data32 & B_PCH_SPI_FMRRA_MASK) != 0x00010F00) &&
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((Data32 & B_PCH_SPI_FMRRA_MASK) != 0x00011F00) &&
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((Data32 & B_PCH_SPI_FMRRA_MASK) != 0x00000B00) &&
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((Data32 & B_PCH_SPI_FMRRA_MASK) != 0x00001B00) &&
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((Data32 & B_PCH_SPI_FMRRA_MASK) != 0x00010B00) &&
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((Data32 & B_PCH_SPI_FMRRA_MASK) != 0x00011B00)) {
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DEBUG ((DEBUG_INFO, "Bios Region Master Read Access 0x%x\n",(Data32 & B_PCH_SPI_FMRRA_MASK)));
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_A ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_A);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 13. BIOS Master Read Access\n"));
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Frap = MmioRead16 (PchSpiBar0+ R_PCH_SPI_FRAP);
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if ((Frap & B_PCH_SPI_FRAP_BMRAG_MASK) != 0) {
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DEBUG ((DEBUG_INFO, "BMRAG 0x%x\n",(Frap & B_PCH_SPI_FRAP_BMRAG_MASK)));
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_A ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_A);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 14. BIOS Master Write Access\n"));
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if ((Frap & B_PCH_SPI_FRAP_BMWAG_MASK) != 0) {
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DEBUG ((DEBUG_INFO, "BMWAG 0x%x\n",(Frap & B_PCH_SPI_FRAP_BMWAG_MASK)));
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_A ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_A);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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if (PchIsGbeRegionValid ()) {
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DEBUG ((DEBUG_INFO, " 15. GbE Region Access\n"));
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Data32 = 0;
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Data32 = Data32 | V_PCH_SPI_FDOC_FDSS_MSTR | 0x8;
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MmioWrite32 (PchSpiBar0 + R_PCH_SPI_FDOC, Data32);
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Data32 = MmioRead32 (PchSpiBar0 + R_PCH_SPI_FDOD);
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if (Data32 != 0x00800900) {
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DEBUG ((DEBUG_INFO, "Gbe Region Access 0x%x\n",Data32));
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_A ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_A);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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}
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DEBUG ((DEBUG_INFO, " 16. CSME Region Access\n"));
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Data32 = 0;
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Data32 = Data32 | V_PCH_SPI_FDOC_FDSS_MSTR | 0x4;
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MmioWrite32 (PchSpiBar0 + R_PCH_SPI_FDOC, Data32);
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Data32 = MmioRead32 (PchSpiBar0 + R_PCH_SPI_FDOD);
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if ((Data32 != 0x00400D00) &&
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(Data32 != 0x00C00D00) &&
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(Data32 != 0x10C10D00)) {
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DEBUG ((DEBUG_INFO, "Csme Region Access 0x%x\n",Data32));
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_A ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_A);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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DEBUG ((DEBUG_INFO, " 17. EC Region Access\n"));
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Data32 = 0;
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Data32 = Data32 | V_PCH_SPI_FDOC_FDSS_MSTR | 0x10;
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MmioWrite32 (PchSpiBar0 + R_PCH_SPI_FDOC, Data32);
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Data32 = MmioRead32 (PchSpiBar0 + R_PCH_SPI_FDOD);
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if ((Data32 != 0x10010300)&&
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(Data32 != 0x10010100)&&
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(Data32 != 0x10010000)) {
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DEBUG ((DEBUG_INFO, "Ec Region access 0x%x\n",Data32));
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HstiErrorString = BuildHstiErrorString (HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_CODE_A ,HSTI_SPI_FLASH_CONFIGURATION, HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_ERROR_STRING_A);
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Status = HstiLibAppendErrorString (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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HstiErrorString
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);
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ASSERT_EFI_ERROR (Status);
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Result = FALSE;
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FreePool (HstiErrorString);
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}
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//
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// ALL PASS
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//
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if (Result) {
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Status = HstiLibSetFeaturesVerified (
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PLATFORM_SECURITY_ROLE_PLATFORM_REFERENCE,
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NULL,
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0,
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HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION
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);
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ASSERT_EFI_ERROR (Status);
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}
|
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return;
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}
|