/** @file
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CPU Platform Lib implementation.
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "CpuPlatformLibrary.h"
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#include <Library/MmPciLib.h>
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#include <SaRegs.h>
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#define SKIP_MICROCODE_CHECKSUM_CHECK 1
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/**
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Return CPU Family ID
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@retval CPU_FAMILY CPU Family ID
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**/
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CPU_FAMILY
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EFIAPI
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GetCpuFamily (
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VOID
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)
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{
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EFI_CPUID_REGISTER Cpuid;
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///
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/// Read the CPUID information
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///
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AsmCpuid (CPUID_VERSION_INFO, &Cpuid.RegEax, &Cpuid.RegEbx, &Cpuid.RegEcx, &Cpuid.RegEdx);
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return ((CPU_FAMILY) (Cpuid.RegEax & CPUID_FULL_FAMILY_MODEL));
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}
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/**
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Return Cpu stepping type
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@retval UINT8 Cpu stepping type
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**/
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CPU_STEPPING
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EFIAPI
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GetCpuStepping (
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VOID
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)
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{
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EFI_CPUID_REGISTER Cpuid;
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///
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/// Read the CPUID information
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///
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AsmCpuid (CPUID_VERSION_INFO, &Cpuid.RegEax, &Cpuid.RegEbx, &Cpuid.RegEcx, &Cpuid.RegEdx);
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return ((CPU_STEPPING) (Cpuid.RegEax & CPUID_FULL_STEPPING));
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}
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/**
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Return CPU Sku
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@retval UINT8 CPU Sku
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**/
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UINT8
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EFIAPI
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GetCpuSku (
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VOID
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)
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{
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UINT8 CpuType;
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UINT16 CpuDid;
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UINT32 CpuFamilyModel;
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EFI_CPUID_REGISTER Cpuid;
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BOOLEAN SkuFound;
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SkuFound = TRUE;
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CpuType = EnumCpuUnknown;
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///
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/// Read the CPUID & DID information
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///
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AsmCpuid (CPUID_VERSION_INFO, &Cpuid.RegEax, &Cpuid.RegEbx, &Cpuid.RegEcx, &Cpuid.RegEdx);
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CpuFamilyModel = Cpuid.RegEax & CPUID_FULL_FAMILY_MODEL;
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CpuDid = MmioRead16 (MmPciBase (0, 0, 0) + 2);
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switch (CpuFamilyModel) {
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case CPUID_FULL_FAMILY_MODEL_SKYLAKE_ULT_ULX:
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switch (CpuDid) {
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case V_SA_DEVICE_ID_SKL_MB_ULT_1: // ULT OPI
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case V_SA_DEVICE_ID_KBL_MB_ULT_1: // KBL ULT OPI
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CpuType = EnumCpuUlt;
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break;
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case V_SA_DEVICE_ID_SKL_MB_ULX_2: // ULX OPI
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case V_SA_DEVICE_ID_SKL_MB_ULX_3: // ULX OPI
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case V_SA_DEVICE_ID_KBL_MB_ULX_1: // ULX OPI
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CpuType = EnumCpuUlx;
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break;
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default:
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SkuFound = FALSE;
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break;
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}
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break;
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case CPUID_FULL_FAMILY_MODEL_SKYLAKE_DT_HALO:
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switch (CpuDid) {
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case V_SA_DEVICE_ID_SKL_DT_1: // DT
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case V_SA_DEVICE_ID_SKL_DT_2: // DT
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case V_SA_DEVICE_ID_KBL_DT_1: // DT
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case V_SA_DEVICE_ID_KBL_DT_2: // DT
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CpuType = EnumCpuTrad;
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break;
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case V_SA_DEVICE_ID_SKL_HALO_1: // Halo
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case V_SA_DEVICE_ID_SKL_HALO_2: // Halo
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case V_SA_DEVICE_ID_KBL_HALO_1: // Halo
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case V_SA_DEVICE_ID_KBL_HALO_2: // Halo
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case V_SA_DEVICE_ID_SKL_SVR_1: // Server
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case V_SA_DEVICE_ID_SKL_SVR_2: // Server
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case V_SA_DEVICE_ID_KBL_SVR_1: // Server
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case V_SA_DEVICE_ID_KBL_SVR_2: // Server
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CpuType = EnumCpuHalo;
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break;
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default:
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SkuFound = FALSE;
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break;
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}
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break;
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case CPUID_FULL_FAMILY_MODEL_KABYLAKE_ULT_ULX:
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switch (CpuDid) {
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case V_SA_DEVICE_ID_KBL_MB_ULT_1: // KBL ULT OPI
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case V_SA_DEVICE_ID_KBLR_MB_ULT_1: // KBL-R ULT
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CpuType = EnumCpuUlt;
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break;
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case V_SA_DEVICE_ID_KBL_MB_ULX_1: // ULX OPI
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CpuType = EnumCpuUlx;
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break;
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default:
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SkuFound = FALSE;
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break;
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}
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break;
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case CPUID_FULL_FAMILY_MODEL_KABYLAKE_DT_HALO:
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switch (CpuDid) {
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case V_SA_DEVICE_ID_KBL_DT_1: // DT
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case V_SA_DEVICE_ID_KBL_DT_2: // DT
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case V_SA_DEVICE_ID_CFL_DT: // DT
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CpuType = EnumCpuTrad;
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break;
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case V_SA_DEVICE_ID_KBL_HALO_1: // Halo
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case V_SA_DEVICE_ID_KBL_HALO_2: // Halo
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case V_SA_DEVICE_ID_KBL_SVR_1: // Server
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case V_SA_DEVICE_ID_KBL_SVR_2: // Server
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CpuType = EnumCpuHalo;
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break;
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default:
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SkuFound = FALSE;
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break;
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}
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break;
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default:
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SkuFound = FALSE;
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break;
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}
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if (!SkuFound) {
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DEBUG ((DEBUG_ERROR, "Unsupported CPU SKU, Device ID: 0x%02X, CPUID: 0x%08X!\n", CpuDid, CpuFamilyModel));
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ASSERT (FALSE);
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}
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return CpuType;
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}
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/**
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Returns the processor microcode revision of the processor installed in the system.
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@retval Processor Microcode Revision
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**/
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UINT32
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GetCpuUcodeRevision (
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VOID
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)
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{
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AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);
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AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
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return (UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID), 32);
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}
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/**
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Verify the DWORD type checksum
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@param[in] ChecksumAddr - The start address to be checkumed
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@param[in] ChecksumLen - The length of data to be checksumed
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@retval EFI_SUCCESS - Checksum correct
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@retval EFI_CRC_ERROR - Checksum incorrect
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**/
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EFI_STATUS
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Checksum32Verify (
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IN UINT32 *ChecksumAddr,
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IN UINT32 ChecksumLen
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)
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{
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#if SKIP_MICROCODE_CHECKSUM_CHECK
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return EFI_SUCCESS;
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#else
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UINT32 Checksum;
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UINT32 Index;
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Checksum = 0;
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for (Index = 0; Index < ChecksumLen; Index++) {
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Checksum += ChecksumAddr[Index];
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}
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return (Checksum == 0) ? EFI_SUCCESS : EFI_CRC_ERROR;
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#endif
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}
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/**
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This function checks the MCU revision to decide if BIOS needs to load
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microcode.
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@param[in] MicrocodePointer - Microcode in memory
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@param[in] Revision - Current CPU microcode revision
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@retval EFI_SUCCESS - BIOS needs to load microcode
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@retval EFI_ABORTED - Don't need to update microcode
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**/
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EFI_STATUS
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CheckMcuRevision (
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IN CPU_MICROCODE_HEADER *MicrocodePointer,
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IN UINT32 Revision
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)
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{
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EFI_STATUS Status;
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Status = EFI_ABORTED;
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if ((MicrocodePointer->UpdateRevision & 0x80000000) ||
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(MicrocodePointer->UpdateRevision > Revision) ||
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(Revision == 0)) {
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Status = EFI_SUCCESS;
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}
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return Status;
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}
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/**
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Check if this microcode is correct one for processor
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@param[in] Cpuid - processor CPUID
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@param[in] MicrocodeEntryPoint - entry point of microcode
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@param[in] Revision - revision of microcode
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@retval CorrectMicrocode if this microcode is correct
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**/
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BOOLEAN
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CheckMicrocode (
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IN UINT32 Cpuid,
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IN CPU_MICROCODE_HEADER *MicrocodeEntryPoint,
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IN UINT32 *Revision
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)
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{
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EFI_STATUS Status;
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UINT8 ExtendedIndex;
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MSR_IA32_PLATFORM_ID_REGISTER Msr;
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UINT32 ExtendedTableLength;
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UINT32 ExtendedTableCount;
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BOOLEAN CorrectMicrocode;
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CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;
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CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;
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Status = EFI_NOT_FOUND;
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ExtendedTableLength = 0;
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CorrectMicrocode = FALSE;
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if (MicrocodeEntryPoint == NULL) {
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return FALSE;
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}
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Msr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);
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///
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/// Check if the microcode is for the Cpu and the version is newer
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/// and the update can be processed on the platform
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///
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if ((MicrocodeEntryPoint->HeaderVersion == 0x00000001) &&
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!EFI_ERROR (CheckMcuRevision (MicrocodeEntryPoint, *Revision))
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) {
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if ((MicrocodeEntryPoint->ProcessorId == Cpuid) && (MicrocodeEntryPoint->ProcessorFlags & (1 << (UINT8) Msr.Bits.PlatformId))) {
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if (MicrocodeEntryPoint->DataSize == 0) {
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Status = Checksum32Verify ((UINT32 *) MicrocodeEntryPoint, 2048 / sizeof (UINT32));
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} else {
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Status = Checksum32Verify (
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(UINT32 *) MicrocodeEntryPoint,
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(MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER)) / sizeof (UINT32)
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);
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}
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if (!EFI_ERROR (Status)) {
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CorrectMicrocode = TRUE;
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}
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} else if ((MicrocodeEntryPoint->DataSize != 0)) {
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///
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/// Check the Extended Signature if the entended signature exist
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/// Only the data size != 0 the extended signature may exist
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///
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ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER));
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if (ExtendedTableLength != 0) {
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///
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/// Extended Table exist, check if the CPU in support list
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///
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ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint) + MicrocodeEntryPoint->DataSize + 48);
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///
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/// Calulate Extended Checksum
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///
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if ((ExtendedTableLength % 4) == 0) {
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Status = Checksum32Verify ((UINT32 *) ExtendedTableHeader, ExtendedTableLength / sizeof (UINT32));
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if (!EFI_ERROR (Status)) {
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///
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/// Checksum correct
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///
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ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;
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ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);
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for (ExtendedIndex = 0; ExtendedIndex < ExtendedTableCount; ExtendedIndex++) {
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///
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/// Verify Header
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///
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if ((ExtendedTable->ProcessorSignature == Cpuid) && (ExtendedTable->ProcessorFlag & (1 << (UINT8) Msr.Bits.PlatformId))) {
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Status = Checksum32Verify (
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(UINT32 *) ExtendedTable,
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sizeof (CPU_MICROCODE_EXTENDED_TABLE) / sizeof (UINT32)
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);
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if (!EFI_ERROR (Status)) {
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///
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/// Find one
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///
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CorrectMicrocode = TRUE;
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break;
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}
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}
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ExtendedTable++;
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}
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}
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}
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}
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}
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}
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return CorrectMicrocode;
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}
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/**
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Check on the processor if SGX is supported.
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@dot
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digraph G {
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subgraph cluster_c0 {
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node [shape = box];
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b1[label="Read CPUID(EAX=7,ECX=0):EBX[2] \nto check SGX feature" fontsize=12 style=filled color=lightblue];
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b2[label="Return TRUE" fontsize=12 style=filled color=lightblue];
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b3[label="Return FALSE" fontsize=12 style=filled color=lightblue];
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node [shape = ellipse];
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e1[label="Start" fontsize=12 style=filled color=lightblue];
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e2[label="End" fontsize=12 style=filled color=lightblue];
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node [shape = diamond,style=filled,color=lightblue];
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d1[label="Are SGX feature supported and \nPRMRR configuration enabled" fontsize=12];
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label = "IsSgxSupported Flow"; fontsize=15; fontcolor=black; color=lightblue;
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e1 -> b1
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b1 -> d1
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d1 -> b2 [label="Yes" fontsize=9]
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d1 -> b3 [label="No" fontsize=9]
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b2 -> e2
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b3 -> e2
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}
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}
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@enddot
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@retval TRUE if SGX supported
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@retval FALSE if SGX is not supported
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**/
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BOOLEAN
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IsSgxSupported (
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VOID
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)
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{
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EFI_CPUID_REGISTER CpuidRegs;
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//
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// Processor support SGX feature by reading CPUID.(EAX=7,ECX=0):EBX[2]
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//
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AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, &CpuidRegs.RegEax,&CpuidRegs.RegEbx,&CpuidRegs.RegEcx,&CpuidRegs.RegEdx);
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///
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/// SGX feature is supported only on SKL and later,
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/// with CPUID.(EAX=7,ECX=0):EBX[2]=1
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/// PRMRR configuration enabled, MSR IA32_MTRRCAP (FEh) [12] == 1
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///
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if (((CpuidRegs.RegEbx & BIT2)) && (AsmReadMsr64 (MSR_IA32_MTRRCAP) & BIT12)) {
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return TRUE;
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}
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return FALSE;
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}
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/**
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Get processor generation
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@retval EnumSklCpu Executing thread is Skylake
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@retval EnumKblCpu Executing thread is Kabylake
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**/
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CPU_GENERATION
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GetCpuGeneration (
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VOID
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)
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{
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EFI_CPUID_REGISTER Cpuid;
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CPU_FAMILY CpuFamilyModel;
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CPU_STEPPING CpuStepping;
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CPU_GENERATION CpuGeneration;
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CpuGeneration = EnumSklCpu;
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///
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/// Read the CPUID information
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///
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AsmCpuid (CPUID_VERSION_INFO, &Cpuid.RegEax, &Cpuid.RegEbx, &Cpuid.RegEcx, &Cpuid.RegEdx);
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CpuFamilyModel = (CPU_FAMILY) (Cpuid.RegEax & CPUID_FULL_FAMILY_MODEL);
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CpuStepping = (CPU_STEPPING) (Cpuid.RegEax & CPUID_FULL_STEPPING);
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switch (CpuFamilyModel) {
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case EnumCpuKblUltUlx:
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case EnumCpuKblDtHalo:
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CpuGeneration = EnumKblCpu;
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break;
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case EnumCpuSklUltUlx:
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case EnumCpuSklDtHalo:
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if (((CpuStepping > EnumSklMaxUltUlxStep) && (CpuStepping <= EnumKblMaxUltUlxStep)) ||
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((CpuStepping > EnumSklMaxDtHaloStep) && (CpuStepping <= EnumKblMaxDtHaloStep))) {
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CpuGeneration = EnumKblCpu;
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}
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break;
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default:
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CpuGeneration = EnumSklCpu;
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break;
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}
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return CpuGeneration;
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}
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