/** @file
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Defines and prototypes for the System Agent PCIe library module
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This library is expected to share between DXE and SMM drivers.
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Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _SA_PCIE_LIB_H_
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#define _SA_PCIE_LIB_H_
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#include <Library/S3BootScriptLib.h>
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#include <Protocol/SaPolicy.h>
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#define MAX_SUPPORTED_ROOT_BRIDGE_NUMBER 3
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#define MAX_SUPPORTED_DEVICE_NUMBER 192
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/**
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Enumerate all end point devices connected to root bridge ports and record their MMIO base address
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@exception EFI_UNSUPPORTED PCIe capability structure not found
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@retval EFI_SUCCESS All done successfully
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**/
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EFI_STATUS
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EnumerateAllPcieDevices (
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VOID
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);
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/**
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Sets Common Clock, TCx-VC0 mapping, and Max Payload for PCIe
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**/
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VOID
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SaPcieConfigBeforeOpRom (
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VOID
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);
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/**
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This function does all SA ASPM initialization
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**/
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VOID
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SaAspm (
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VOID
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);
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/**
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This function checks PEG end point device for extended tag capability and enables them if they are.
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**/
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VOID
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EnableExtendedTag (
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VOID
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);
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/**
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This function handles SA S3 resume
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**/
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VOID
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SaS3Resume (
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VOID
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);
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/**
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Wrapper function for all SA S3 resume tasks which can be a callback function.
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**/
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VOID
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SaS3ResumeCallback (
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VOID
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);
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#endif
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