/** @file
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Internal header file for PCH DMI library for SIP14
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Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __PCH_DMI_14_H__
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#define __PCH_DMI_14_H__
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#include <Private/Library/PchDmiLib.h>
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#include <Private/Library/PeiPchDmiLib.h>
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/**
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This function checks if DMI SIP14 Secured Register Lock (SRL) is set
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@retval SRL state
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**/
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BOOLEAN
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IsPchDmi14Locked (
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VOID
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);
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/**
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Enable PCIe Relaxed Order for DMI SIP14
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**/
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VOID
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PchDmi14EnablePcieRelaxedOrder (
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VOID
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);
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/**
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This function will switch SAI value to be driven to IOSF Primary Fabric
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for cycles with Core BDF from HOSTIA_BOOT_SAI to HOSTIA_POSTBOOT_SAI.
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To be used when PCH is paired with CFL CPU.
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**/
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VOID
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PchDmi14EnablePostBootSai (
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VOID
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);
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/**
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Secure Register Lock data
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@param[out] SrlRegOffset Register offset holding Secure Register Lock setting
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@param[out] SrlRegMask Mask for Secure Register Lock setting
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**/
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VOID
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PchDmi14SrlRegData (
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OUT UINT16 *SrlRegOffset,
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OUT UINT32 *SrlRegMask
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);
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/**
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Get PCH DMI SIP14 Virtual Channel Control and Status registers
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@param[in] Vc The virtual channel number for programing
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@param[out] DmiVcCtlAddress DMI Virtual Channel Control register address
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@param[out] DmiVcStsAddress DMI Virtual Channel Status register address
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**/
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VOID
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PchDmi14VcRegs (
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IN PCH_DMI_VC_TYPE Vc,
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OUT UINT16 *DmiVcCtlAddress,
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OUT UINT16 *DmiVcStsAddress
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);
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#endif
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