/** @file
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This file contains routines for eSPI
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Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Base.h>
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#include <Uefi/UefiBaseType.h>
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#include <Library/IoLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/PchEspiLib.h>
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#include <Library/PchPcrLib.h>
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#include <Library/PchInfoLib.h>
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#include <Library/TimerLib.h>
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#include <PchLimits.h>
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#include <Register/PchRegsPcr.h>
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#include <Register/PchRegsLpc.h>
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#define CHANNEL_RESET_TIMEOUT 100 ///< Channel reset timeout in us after which to report error
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#define SLAVE_CHANNELS_MAX 7 ///< Max number of channels
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//
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// eSPI Slave registers
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//
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#define R_ESPI_SLAVE_GENCAP 0x08 ///< General Capabilities and Configurations
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#define B_ESPI_SLAVE_GENCAP_SUPPCHAN 0xFF ///< Channels supported bit mask
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#define R_ESPI_SLAVE_CHACAP_BASE 0x10 ///< Base address from which channel Cap and Conf registers start on slave
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#define S_ESPI_SLAVE_CHACAP_OFFSET 0x10 ///< Offset for each channel from base
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#define B_ESPI_SLAVE_CHACAP_CHEN BIT0 ///< Slave Channel enable bit
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#define B_ESPI_SLAVE_CHACAP_CHRDY BIT1 ///< Slave Channel ready bit
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/**
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Checks if second slave capability is enabled
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@retval TRUE There's second slave
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@retval FALSE There's no second slave
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**/
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BOOLEAN
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IsEspiSecondSlaveSupported (
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VOID
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)
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{
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return (IsPchH () && ((PchPcrRead32 (PID_ESPISPI, R_ESPI_PCR_SOFTSTRAPS) & R_ESPI_PCR_SOFTSTRAPS_CS1_EN) != 0));
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}
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/**
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Checks in slave General Capabilities register if it supports channel with requested number
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@param[in] SlaveId Id of slave to check
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@param[in] ChannelNumber Number of channel of which to check
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@retval TRUE Channel with requested number is supported by slave device
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@retval FALSE Channel with requested number is not supported by slave device
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**/
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BOOLEAN
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IsEspiSlaveChannelSupported (
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UINT8 SlaveId,
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UINT8 ChannelNumber
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)
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{
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EFI_STATUS Status;
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UINT32 Data32;
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UINT8 SupportedChannels;
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Status = PchEspiSlaveGetConfig (SlaveId, R_ESPI_SLAVE_GENCAP, &Data32);
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if (EFI_ERROR (Status)) {
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return FALSE;
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}
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SupportedChannels = (UINT8) (Data32 & B_ESPI_SLAVE_GENCAP_SUPPCHAN);
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DEBUG ((DEBUG_INFO, "Slave %d supported channels 0x%4X\n", SlaveId, SupportedChannels));
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if (ChannelNumber > SLAVE_CHANNELS_MAX || !(SupportedChannels & (BIT0 << ChannelNumber))) {
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// Incorrect channel number was specified. Either exceeded max or Slave doesn't support that channel.
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return FALSE;
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}
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return TRUE;
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}
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/**
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Is eSPI enabled in strap.
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@retval TRUE Espi is enabled in strap
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@retval FALSE Espi is disabled in strap
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**/
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BOOLEAN
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IsEspiEnabled (
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VOID
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)
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{
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return (PchPcrRead32 (PID_ESPISPI, R_ESPI_PCR_CFG_VAL) & B_ESPI_PCR_CFG_VAL_ESPI_EN) != 0;
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}
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/**
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eSPI helper function to clear slave configuration register status
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@retval EFI_SUCCESS Write to private config space succeed
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@retval others Read / Write failed
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**/
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STATIC
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VOID
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EspiClearScrs (
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VOID
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)
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{
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PchPcrAndThenOr32 (
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PID_ESPISPI,
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R_ESPI_PCR_SLV_CFG_REG_CTL,
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(UINT32) ~0,
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B_ESPI_PCR_SLV_CFG_REG_CTL_SCRS
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);
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}
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/**
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eSPI helper function to poll slave configuration register enable for 0
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and to check for slave configuration register status
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@retval EFI_SUCCESS Enable bit is zero and no error in status bits
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@retval EFI_DEVICE_ERROR Error in SCRS
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@retval others Read / Write to private config space failed
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**/
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STATIC
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EFI_STATUS
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EspiPollScreAndCheckScrs (
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VOID
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)
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{
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UINT32 ScrStat;
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do {
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ScrStat = PchPcrRead32 (PID_ESPISPI, R_ESPI_PCR_SLV_CFG_REG_CTL);
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} while ((ScrStat & B_ESPI_PCR_SLV_CFG_REG_CTL_SCRE) != 0);
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ScrStat = (ScrStat & B_ESPI_PCR_SLV_CFG_REG_CTL_SCRS) >> N_ESPI_PCR_SLV_CFG_REG_CTL_SCRS;
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if (ScrStat != V_ESPI_PCR_SLV_CFG_REG_CTL_SCRS_NOERR) {
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DEBUG ((DEBUG_ERROR, "eSPI slave config register status (error) is %x \n", ScrStat));
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return EFI_DEVICE_ERROR;
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}
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return EFI_SUCCESS;
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}
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typedef enum {
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EspiSlaveOperationConfigRead,
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EspiSlaveOperationConfigWrite,
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EspiSlaveOperationStatusRead,
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EspiSlaveOperationInBandReset
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} ESPI_SLAVE_OPERATION;
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/**
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Helper library to do all the operations regards to eSPI slave
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@param[in] SlaveId eSPI Slave ID
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@param[in] SlaveAddress Slave address to be put in R_ESPI_PCR_SLV_CFG_REG_CTL[11:0]
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@param[in] SlaveOperation Based on ESPI_SLAVE_OPERATION
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@param[in,out] Data
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@retval EFI_SUCCESS Operation succeed
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@retval EFI_INVALID_PARAMETER Slave ID is not supported or SlaveId 1 is used in PCH_LP
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@retval EFI_INVALID_PARAMETER Slave configuration register address exceed maximum allowed
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@retval EFI_INVALID_PARAMETER Slave configuration register address is not DWord aligned
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@retval EFI_ACCESS_DENIED eSPI Slave write to address range 0 to 0x7FF has been locked
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@retval EFI_DEVICE_ERROR Error in SCRS during polling stage of operation
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**/
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STATIC
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EFI_STATUS
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EspiSlaveOperationHelper (
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IN UINT32 SlaveId,
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IN UINT32 SlaveAddress,
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IN ESPI_SLAVE_OPERATION SlaveOperation,
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IN OUT UINT32 *Data
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)
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{
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EFI_STATUS Status;
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UINT32 Data32;
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//
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// Check the SlaveId is 0 or 1
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//
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if (SlaveId >= PCH_MAX_ESPI_SLAVES) {
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DEBUG ((DEBUG_ERROR, "eSPI Slave ID of %d or more is not accepted \n", PCH_MAX_ESPI_SLAVES));
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return EFI_INVALID_PARAMETER;
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}
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//
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// Check if SlaveId 1 is used, it is a PCH_H
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//
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if ((SlaveId == 1) && (IsPchLp ())) {
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DEBUG ((DEBUG_ERROR, "eSPI Slave ID of 1 is only available on PCH_H \n"));
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return EFI_INVALID_PARAMETER;
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}
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//
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// Check the address is not more then 0xFFF
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//
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if (SlaveAddress > B_ESPI_PCR_SLV_CFG_REG_CTL_SCRA) {
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DEBUG ((DEBUG_ERROR, "eSPI Slave address must be less than 0x%x \n", (B_ESPI_PCR_SLV_CFG_REG_CTL_SCRA + 1)));
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return EFI_INVALID_PARAMETER;
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}
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//
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// Check the address is DWord aligned
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//
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if ((SlaveAddress & 0x3) != 0) {
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DEBUG ((DEBUG_ERROR, "eSPI Slave address must be DWord aligned \n"));
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return EFI_INVALID_PARAMETER;
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}
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//
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// Check if write is allowed
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//
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if ((SlaveOperation == EspiSlaveOperationConfigWrite) &&
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(SlaveAddress <= 0x7FF)) {
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//
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// If the SLCRR is not set in corresponding slave, we will check the lock bit
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//
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Data32 = PchPcrRead32 (PID_ESPISPI, (UINT16) (R_ESPI_PCR_LNKERR_SLV0 + (SlaveId * S_ESPI_PCR_LNKERR_SLV0)));
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if ((Data32 & B_ESPI_PCR_LNKERR_SLV0_SLCRR) == 0) {
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Data32 = PchPcrRead32 (PID_ESPISPI, (UINT16) R_ESPI_PCR_SLV_CFG_REG_CTL);
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if ((Data32 & B_ESPI_PCR_SLV_CFG_REG_CTL_SBLCL) != 0) {
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DEBUG ((DEBUG_ERROR, "eSPI Slave write to address range 0 to 0x7FF has been locked \n"));
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return EFI_ACCESS_DENIED;
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}
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}
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}
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//
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// Input check done, now go through all the processes
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//
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EspiClearScrs ();
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if (SlaveOperation == EspiSlaveOperationConfigWrite) {
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PchPcrWrite32 (
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PID_ESPISPI,
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(UINT16) R_ESPI_PCR_SLV_CFG_REG_DATA,
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*Data
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);
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}
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PchPcrAndThenOr32 (
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PID_ESPISPI,
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(UINT16) R_ESPI_PCR_SLV_CFG_REG_CTL,
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(UINT32) ~(B_ESPI_PCR_SLV_CFG_REG_CTL_SID | B_ESPI_PCR_SLV_CFG_REG_CTL_SCRT | B_ESPI_PCR_SLV_CFG_REG_CTL_SCRA),
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(B_ESPI_PCR_SLV_CFG_REG_CTL_SCRE |
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(SlaveId << N_ESPI_PCR_SLV_CFG_REG_CTL_SID) |
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(((UINT32) SlaveOperation) << N_ESPI_PCR_SLV_CFG_REG_CTL_SCRT) |
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SlaveAddress
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)
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);
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Status = EspiPollScreAndCheckScrs ();
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if (EFI_ERROR (Status)) {
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return Status;
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}
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if ((SlaveOperation == EspiSlaveOperationConfigRead) || (SlaveOperation == EspiSlaveOperationStatusRead)) {
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Data32 = PchPcrRead32 (
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PID_ESPISPI,
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(UINT16) R_ESPI_PCR_SLV_CFG_REG_DATA
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);
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if (SlaveOperation == EspiSlaveOperationStatusRead) {
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*Data = Data32 & 0xFFFF;
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} else {
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*Data = Data32;
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Get configuration from eSPI slave
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@param[in] SlaveId eSPI slave ID
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@param[in] SlaveAddress Slave Configuration Register Address
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@param[out] OutData Configuration data read
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@retval EFI_SUCCESS Operation succeed
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@retval EFI_INVALID_PARAMETER Slave ID is not supported
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@retval EFI_INVALID_PARAMETER Slave ID is not supported or SlaveId 1 is used in PCH_LP
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@retval EFI_INVALID_PARAMETER Slave configuration register address exceed maximum allowed
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@retval EFI_INVALID_PARAMETER Slave configuration register address is not DWord aligned
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@retval EFI_DEVICE_ERROR Error in SCRS during polling stage of operation
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**/
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EFI_STATUS
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PchEspiSlaveGetConfig (
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IN UINT32 SlaveId,
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IN UINT32 SlaveAddress,
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OUT UINT32 *OutData
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)
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{
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//
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// 1. Clear status from previous transaction by writing 111b to status in SCRS, PCR[eSPI] + 4000h [30:28]
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// 2. Program SLV_CFG_REG_CTL with the right value (Bit[31]=01, Bit [20:19]=<SlvID>, Bit [17:16] = 00b, Bit[11:0] = <addr_xxx>.
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// 3. Poll the SCRE (PCR[eSPI] +4000h [31]) to be set back to 0
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// 4. Check the transaction status in SCRS (bits [30:28])
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// 5. Read SLV_CFG_REG_DATA.
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//
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return EspiSlaveOperationHelper (SlaveId, SlaveAddress, EspiSlaveOperationConfigRead, OutData);
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}
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/**
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Set eSPI slave configuration
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Note: A Set_Configuration must always be followed by a Get_Configuration in order to ensure
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that the internal state of the eSPI-MC is consistent with the Slave's register settings.
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@param[in] SlaveId eSPI slave ID
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@param[in] SlaveAddress Slave Configuration Register Address
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@param[in] InData Configuration data to write
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@retval EFI_SUCCESS Operation succeed
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@retval EFI_INVALID_PARAMETER Slave ID is not supported or SlaveId 1 is used in PCH_LP
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@retval EFI_INVALID_PARAMETER Slave configuration register address exceed maximum allowed
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@retval EFI_INVALID_PARAMETER Slave configuration register address is not DWord aligned
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@retval EFI_ACCESS_DENIED eSPI Slave write to address range 0 to 0x7FF has been locked
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@retval EFI_DEVICE_ERROR Error in SCRS during polling stage of operation
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**/
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EFI_STATUS
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PchEspiSlaveSetConfig (
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IN UINT32 SlaveId,
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IN UINT32 SlaveAddress,
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IN UINT32 InData
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)
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{
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EFI_STATUS Status;
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UINT32 Data32;
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//
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// 1. Clear status from previous transaction by writing 111b to status in SCRS, PCR[eSPI] + 4000h [30:28]
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// 2. Program SLV_CFG_REG_DATA with the write value.
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// 3. Program SLV_CFG_REG_CTL with the right value (Bit[31]=01, Bit [20:19]=<SlvID>, Bit [17:16] = 01b, Bit[11:0] = <addr_xxx>.
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// 4. Poll the SCRE (PCR[eSPI] +4000h [31]) to be set back to 0
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// 5. Check the transaction status in SCRS (bits [30:28])
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//
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Status = EspiSlaveOperationHelper (SlaveId, SlaveAddress, EspiSlaveOperationConfigWrite, &InData);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Status = PchEspiSlaveGetConfig (SlaveId, SlaveAddress, &Data32);
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return Status;
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}
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/**
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Get status from eSPI slave
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@param[in] SlaveId eSPI slave ID
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@param[out] OutData Configuration data read
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@retval EFI_SUCCESS Operation succeed
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@retval EFI_INVALID_PARAMETER Slave ID is not supported or SlaveId 1 is used in PCH_LP
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@retval EFI_DEVICE_ERROR Error in SCRS during polling stage of operation
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**/
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EFI_STATUS
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PchEspiSlaveGetStatus (
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IN UINT32 SlaveId,
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OUT UINT16 *OutData
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)
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{
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EFI_STATUS Status;
|
UINT32 TempOutData;
|
|
TempOutData = 0;
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|
//
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// 1. Clear status from previous transaction by writing 111b to status in SCRS, PCR[eSPI] + 4000h [30:28]
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// 2. Program SLV_CFG_REG_CTL with the right value (Bit[31]=01, Bit [20:19]=<SlvID>, Bit [17:16] = 10b, Bit[11:0] = <addr_xxx>.
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// 3. Poll the SCRE (PCR[eSPI] +4000h [31]) to be set back to 0
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// 4. Check the transaction status in SCRS (bits [30:28])
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// 5. Read SLV_CFG_REG_DATA [15:0].
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//
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Status = EspiSlaveOperationHelper (SlaveId, 0, EspiSlaveOperationStatusRead, &TempOutData);
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*OutData = (UINT16) TempOutData;
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return Status;
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}
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/**
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eSPI slave in-band reset
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@param[in] SlaveId eSPI slave ID
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@retval EFI_SUCCESS Operation succeed
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@retval EFI_INVALID_PARAMETER Slave ID is not supported or SlaveId 1 is used in PCH_LP
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@retval EFI_DEVICE_ERROR Error in SCRS during polling stage of operation
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**/
|
EFI_STATUS
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PchEspiSlaveInBandReset (
|
IN UINT32 SlaveId
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)
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{
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//
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// 1. Clear status from previous transaction by writing 111b to status in SCRS, PCR[eSPI] + 4000h [30:28]
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// 2. Program SLV_CFG_REG_CTL with the right value (Bit[31]=01, Bit [20:19]=<SlvID>, Bit [17:16] = 11b).
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// 3. Poll the SCRE (PCR[eSPI] +4000h [31]) to be set back to 0
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// 4. Check the transaction status in SCRS (bits [30:28])
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//
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return EspiSlaveOperationHelper (SlaveId, 0, EspiSlaveOperationInBandReset, NULL);
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}
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/**
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eSPI Slave channel reset helper function
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@param[in] SlaveId eSPI slave ID
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@param[in] ChannelNumber Number of channel to reset
|
|
@retval EFI_SUCCESS Operation succeeded
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@retval EFI_UNSUPPORTED Slave doesn't support that channel or invalid number specified
|
@retval EFI_TIMEOUT Operation has timeouted
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**/
|
EFI_STATUS
|
PchEspiSlaveChannelReset (
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IN UINT8 SlaveId,
|
IN UINT8 ChannelNumber
|
)
|
{
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UINT8 Timeout;
|
UINT32 Data32;
|
UINT32 SlaveChannelAddress;
|
BOOLEAN SlaveBmeSet;
|
EFI_STATUS Status;
|
|
DEBUG ((DEBUG_INFO, "eSPI slave %d channel %d reset\n", SlaveId, ChannelNumber));
|
|
Timeout = CHANNEL_RESET_TIMEOUT;
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SlaveBmeSet = FALSE;
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|
if (!IsEspiSlaveChannelSupported (SlaveId, ChannelNumber)) {
|
// Incorrect channel number was specified. Either exceeded max or Slave doesn't support that channel.
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DEBUG ((DEBUG_ERROR, "Channel %d is not valid channel number for slave %d!\n", ChannelNumber, SlaveId));
|
return EFI_UNSUPPORTED;
|
}
|
|
// Calculating slave channel address
|
SlaveChannelAddress = R_ESPI_SLAVE_CHACAP_BASE + (S_ESPI_SLAVE_CHACAP_OFFSET * ChannelNumber);
|
|
// If we're resetting Peripheral Channel then we need to disable Bus Mastering first and reenable after reset
|
if (ChannelNumber == 0) {
|
Status = PchEspiSlaveGetConfig (SlaveId, SlaveChannelAddress, &Data32);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
if ((Data32 & B_ESPI_SLAVE_BME) != 0) {
|
Data32 &= ~(B_ESPI_SLAVE_BME);
|
Status = PchEspiSlaveSetConfig (SlaveId, SlaveChannelAddress, Data32);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
SlaveBmeSet = TRUE;
|
}
|
}
|
|
// Disable channel
|
Status = PchEspiSlaveGetConfig (SlaveId, SlaveChannelAddress, &Data32);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
Data32 &= ~(B_ESPI_SLAVE_CHACAP_CHEN);
|
Status = PchEspiSlaveSetConfig (SlaveId, SlaveChannelAddress, Data32);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
// Enable channel
|
Status = PchEspiSlaveGetConfig (SlaveId, SlaveChannelAddress, &Data32);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
Data32 |= B_ESPI_SLAVE_CHACAP_CHEN;
|
Status = PchEspiSlaveSetConfig (SlaveId, SlaveChannelAddress, Data32);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
DEBUG ((DEBUG_INFO, "Waiting for Channel Ready bit\n"));
|
// Wait until channel is ready by polling Channel Ready bit
|
while (((Data32 & B_ESPI_SLAVE_CHACAP_CHRDY) == 0) && (Timeout > 0)) {
|
Status = PchEspiSlaveGetConfig (SlaveId, SlaveChannelAddress, &Data32);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
MicroSecondDelay (1);
|
--Timeout;
|
}
|
|
if (Timeout == 0) {
|
// The waiting for channel to be ready has timed out
|
DEBUG ((DEBUG_ERROR, "The operation of channel %d reset for slave %d has timed out!\n", ChannelNumber, SlaveId));
|
return EFI_TIMEOUT;
|
}
|
|
if (ChannelNumber == 0 && SlaveBmeSet) {
|
Status = PchEspiSlaveGetConfig (SlaveId, SlaveChannelAddress, &Data32);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
Data32 |= B_ESPI_SLAVE_BME;
|
Status = PchEspiSlaveSetConfig (SlaveId, SlaveChannelAddress, Data32);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
}
|
|
return EFI_SUCCESS;
|
}
|
