/** @file
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Generic register definitions for PCH.
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Conventions:
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- Register definition format:
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Prefix_[GenerationName]_[ComponentName]_SubsystemName_RegisterSpace_RegisterName
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- Prefix:
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Definitions beginning with "R_" are registers
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Definitions beginning with "B_" are bits within registers
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Definitions beginning with "V_" are meaningful values within the bits
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Definitions beginning with "S_" are register size
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Definitions beginning with "N_" are the bit position
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- [GenerationName]:
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Three letter acronym of the generation is used .
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Register name without GenerationName applies to all generations.
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- [ComponentName]:
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This field indicates the component name that the register belongs to (e.g. PCH, SA etc.)
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Register name without ComponentName applies to all components.
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Register that is specific to -H denoted by "_PCH_H_" in component name.
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Register that is specific to -LP denoted by "_PCH_LP_" in component name.
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- SubsystemName:
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This field indicates the subsystem name of the component that the register belongs to
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(e.g. PCIE, USB, SATA, GPIO, PMC etc.).
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- RegisterSpace:
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MEM - MMIO space register of subsystem.
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IO - IO space register of subsystem.
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PCR - Private configuration register of subsystem.
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CFG - PCI configuration space register of subsystem.
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- RegisterName:
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Full register name.
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Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _PCH_REGS_H_
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#define _PCH_REGS_H_
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///
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/// The default PCH PCI segment and bus number
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///
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#define DEFAULT_PCI_SEGMENT_NUMBER_PCH 0
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#define DEFAULT_PCI_BUS_NUMBER_PCH 0
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//
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// Default Vendor ID and Subsystem ID
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//
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#define V_PCH_INTEL_VENDOR_ID 0x8086 ///< Default Intel PCH Vendor ID
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#define V_PCH_DEFAULT_SID 0x7270 ///< Default Intel PCH Subsystem ID
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#define V_PCH_DEFAULT_SVID_SID (V_INTEL_VENDOR_ID + (V_PCH_DEFAULT_SID << 16)) ///< Default INTEL PCH Vendor ID and Subsystem ID
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#endif //_PCH_REGS_H_
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