1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
| /** @file
| * Multiple APIC Description Table (MADT)
| *
| * Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
| * Copyright (c) 2018, Hisilicon Limited. All rights reserved.
| * Copyright (c) 2015, Linaro Limited. All rights reserved.
| *
| * This program and the accompanying materials
| *
| * SPDX-License-Identifier: BSD-2-Clause-Patent
| *
| * Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
| *
| **/
|
| #include "Hi1620Platform.h"
|
| #include <Library/AcpiLib.h>
| #include <Library/ArmLib.h>
| #include <Library/PcdLib.h>
| #include <IndustryStandard/Acpi.h>
| #include <Library/AcpiNextLib.h>
|
| // Differs from Juno, we have another affinity level beyond cluster and core
| // 0x20000 is only for socket 0
| #define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
| #define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
| #define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
| #define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
|
| //
| // Multiple APIC Description Table
| //
| #pragma pack (1)
|
| typedef struct {
| EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
| EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT];
| EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
| EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicITS[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT];
| } EFI_ACPI_MULTIPLE_APIC_DESCRIPTION_TABLE;
|
| #pragma pack ()
|
| EFI_ACPI_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
| {
| ARM_ACPI_HEADER (
| EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
| EFI_ACPI_MULTIPLE_APIC_DESCRIPTION_TABLE,
| EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
| ),
| //
| // MADT specific fields
| //
| 0, // LocalApicAddress
| 0, // Flags
| },
| {
| // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Flags, PmuIrq, GicBase, GicVBase, GicHBase,
| // GsivId, GicRBase, Mpidr)
| // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GICC Structure of
| // ACPI v5.1).
| // The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses
| // the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 0, 0, PLATFORM_GET_MPID_TA(0, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x100000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 1, 1, PLATFORM_GET_MPID_TA(0, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x140000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 2, 2, PLATFORM_GET_MPID_TA(0, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x180000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 3, 3, PLATFORM_GET_MPID_TA(0, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x1C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 4, 4, PLATFORM_GET_MPID_TA(1, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x200000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 5, 5, PLATFORM_GET_MPID_TA(1, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x240000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 6, 6, PLATFORM_GET_MPID_TA(1, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x280000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 7, 7, PLATFORM_GET_MPID_TA(1, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x2C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 8, 8, PLATFORM_GET_MPID_TA(2, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x300000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 9, 9, PLATFORM_GET_MPID_TA(2, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x340000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 10, 10, PLATFORM_GET_MPID_TA(2, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x380000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 11, 11, PLATFORM_GET_MPID_TA(2, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x3C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 12, 12, PLATFORM_GET_MPID_TA(3, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x400000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 13, 13, PLATFORM_GET_MPID_TA(3, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x440000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 14, 14, PLATFORM_GET_MPID_TA(3, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x480000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 15, 15, PLATFORM_GET_MPID_TA(3, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x4C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 16, 16, PLATFORM_GET_MPID_TA(4, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x500000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 17, 17, PLATFORM_GET_MPID_TA(4, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x540000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 18, 18, PLATFORM_GET_MPID_TA(4, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x580000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 19, 19, PLATFORM_GET_MPID_TA(4, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x5C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 20, 20, PLATFORM_GET_MPID_TA(5, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x600000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 21, 21, PLATFORM_GET_MPID_TA(5, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x640000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 22, 22, PLATFORM_GET_MPID_TA(5, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x680000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 23, 23, PLATFORM_GET_MPID_TA(5, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAE000000 + 0x6C0000 /* GicRBase */, 0),
|
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 24, 24, PLATFORM_GET_MPID_TB(0, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x100000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 25, 25, PLATFORM_GET_MPID_TB(0, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x140000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 26, 26, PLATFORM_GET_MPID_TB(0, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x180000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 27, 27, PLATFORM_GET_MPID_TB(0, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x1C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 28, 28, PLATFORM_GET_MPID_TB(1, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x200000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 29, 29, PLATFORM_GET_MPID_TB(1, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x240000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 30, 30, PLATFORM_GET_MPID_TB(1, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x280000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 31, 31, PLATFORM_GET_MPID_TB(1, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x2C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 32, 32, PLATFORM_GET_MPID_TB(2, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x300000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 33, 33, PLATFORM_GET_MPID_TB(2, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x340000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 34, 34, PLATFORM_GET_MPID_TB(2, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x380000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 35, 35, PLATFORM_GET_MPID_TB(2, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x3C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 36, 36, PLATFORM_GET_MPID_TB(3, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x400000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 37, 37, PLATFORM_GET_MPID_TB(3, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x440000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 38, 38, PLATFORM_GET_MPID_TB(3, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x480000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 39, 39, PLATFORM_GET_MPID_TB(3, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x4C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 40, 40, PLATFORM_GET_MPID_TB(4, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x500000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 41, 41, PLATFORM_GET_MPID_TB(4, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x540000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 42, 42, PLATFORM_GET_MPID_TB(4, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x580000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 43, 43, PLATFORM_GET_MPID_TB(4, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x5C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 44, 44, PLATFORM_GET_MPID_TB(5, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x600000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 45, 45, PLATFORM_GET_MPID_TB(5, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x640000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 46, 46, PLATFORM_GET_MPID_TB(5, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x680000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 47, 47, PLATFORM_GET_MPID_TB(5, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0xAA000000 + 0x6C0000 /* GicRBase */, 0),
|
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 48, 48, PLATFORM_GET_MPID_TA_2(0, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x100000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 49, 49, PLATFORM_GET_MPID_TA_2(0, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x140000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 50, 50, PLATFORM_GET_MPID_TA_2(0, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x180000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 51, 51, PLATFORM_GET_MPID_TA_2(0, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x1C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 52, 52, PLATFORM_GET_MPID_TA_2(1, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x200000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 53, 53, PLATFORM_GET_MPID_TA_2(1, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x240000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 54, 54, PLATFORM_GET_MPID_TA_2(1, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x280000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 55, 55, PLATFORM_GET_MPID_TA_2(1, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x2C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 56, 56, PLATFORM_GET_MPID_TA_2(2, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x300000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 57, 57, PLATFORM_GET_MPID_TA_2(2, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x340000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 58, 58, PLATFORM_GET_MPID_TA_2(2, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x380000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 59, 59, PLATFORM_GET_MPID_TA_2(2, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x3C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 60, 60, PLATFORM_GET_MPID_TA_2(3, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x400000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 61, 61, PLATFORM_GET_MPID_TA_2(3, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x440000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 62, 62, PLATFORM_GET_MPID_TA_2(3, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x480000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 63, 63, PLATFORM_GET_MPID_TA_2(3, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x4C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 64, 64, PLATFORM_GET_MPID_TA_2(4, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x500000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 65, 65, PLATFORM_GET_MPID_TA_2(4, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x540000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 66, 66, PLATFORM_GET_MPID_TA_2(4, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x580000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 67, 67, PLATFORM_GET_MPID_TA_2(4, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x5C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 68, 68, PLATFORM_GET_MPID_TA_2(5, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x600000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 69, 69, PLATFORM_GET_MPID_TA_2(5, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x640000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 70, 70, PLATFORM_GET_MPID_TA_2(5, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x680000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 71, 71, PLATFORM_GET_MPID_TA_2(5, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AE000000 + 0x6C0000 /* GicRBase */, 0),
|
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 72, 72, PLATFORM_GET_MPID_TB_2(0, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x100000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 73, 73, PLATFORM_GET_MPID_TB_2(0, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x140000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 74, 74, PLATFORM_GET_MPID_TB_2(0, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x180000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 75, 75, PLATFORM_GET_MPID_TB_2(0, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x1C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 76, 76, PLATFORM_GET_MPID_TB_2(1, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x200000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 77, 77, PLATFORM_GET_MPID_TB_2(1, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x240000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 78, 78, PLATFORM_GET_MPID_TB_2(1, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x280000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 79, 79, PLATFORM_GET_MPID_TB_2(1, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x2C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 80, 80, PLATFORM_GET_MPID_TB_2(2, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x300000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 81, 81, PLATFORM_GET_MPID_TB_2(2, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x340000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 82, 82, PLATFORM_GET_MPID_TB_2(2, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x380000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 83, 83, PLATFORM_GET_MPID_TB_2(2, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x3C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 84, 84, PLATFORM_GET_MPID_TB_2(3, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x400000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 85, 85, PLATFORM_GET_MPID_TB_2(3, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x440000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 86, 86, PLATFORM_GET_MPID_TB_2(3, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x480000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 87, 87, PLATFORM_GET_MPID_TB_2(3, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x4C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 88, 88, PLATFORM_GET_MPID_TB_2(4, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x500000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 89, 89, PLATFORM_GET_MPID_TB_2(4, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x540000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 90, 90, PLATFORM_GET_MPID_TB_2(4, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x580000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 91, 91, PLATFORM_GET_MPID_TB_2(4, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x5C0000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 92, 92, PLATFORM_GET_MPID_TB_2(5, 0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x600000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 93, 93, PLATFORM_GET_MPID_TB_2(5, 1), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x640000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 94, 94, PLATFORM_GET_MPID_TB_2(5, 2), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x680000 /* GicRBase */, 0),
| EFI_ACPI_6_1_GICC_STRUCTURE_INIT(
| 95, 95, PLATFORM_GET_MPID_TB_2(5, 3), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
| 0x0, 0x0, 25, 0x4000AA000000 + 0x6C0000 /* GicRBase */, 0),
| },
|
| EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, 0xAE000000, 0, 0x4),
| {
| EFI_ACPI_6_1_GIC_ITS_INIT(0,0x202100000), //peri a
| // EFI_ACPI_6_1_GIC_ITS_INIT(1,0x400202100000), //peri a
| }
| };
|
| //
| // Reference the table being generated to prevent the optimizer from removing the
| // data structure from the executable
| //
| VOID* CONST ReferenceAcpiTable = &Madt;
|
|
