/** @file
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*
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* Static SMBIOS Table for the RaspberryPi platform
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* Derived from EmulatorPkg package
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*
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* Note - Arm SBBR ver 1.2 required and recommended SMBIOS structures:
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* BIOS Information (Type 0)
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* System Information (Type 1)
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* Board Information (Type 2) - Recommended
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* System Enclosure (Type 3)
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* Processor Information (Type 4) - CPU Driver
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* Cache Information (Type 7) - For cache that is external to processor
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* Port Information (Type 8) - Recommended for platforms with physical ports
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* System Slots (Type 9) - If system has slots
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* OEM Strings (Type 11) - Recommended
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* BIOS Language Information (Type 13) - Recommended
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* System Event Log (Type 15) - Recommended (does not exit on RPi)
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* Physical Memory Array (Type 16)
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* Memory Device (Type 17) - For each socketed system-memory Device
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* Memory Array Mapped Address (Type 19) - One per contiguous block per Physical Memroy Array
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* System Boot Information (Type 32)
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* IPMI Device Information (Type 38) - Required for platforms with IPMIv1.0 BMC Host Interface (not applicable to RPi)
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* Onboard Devices Extended Information (Type 41) - Recommended
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* Redfish Host Interface (Type 42) - Required for platforms supporting Redfish Host Interface (not applicable to RPi)
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*
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* Copyright (c) 2017-2018, Andrey Warkentin <andrey.warkentin@gmail.com>
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* Copyright (c) 2013, Linaro.org
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* Copyright (c) 2012, Apple Inc. All rights reserved.<BR>
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* Copyright (c) Microsoft Corporation. All rights reserved.
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* Copyright (c) 2020, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <Base.h>
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#include <IndustryStandard/SmBios.h>
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#include <IndustryStandard/RpiMbox.h>
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#include <Protocol/Smbios.h>
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#include <Protocol/RpiFirmware.h>
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#include <Guid/SmBios.h>
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#include <Library/ArmLib.h>
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#include <Library/DebugLib.h>
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#include <Library/UefiDriverEntryPoint.h>
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#include <Library/UefiLib.h>
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#include <Library/BaseLib.h>
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#include <Library/PcdLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/TimeBaseLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/UefiRuntimeServicesTableLib.h>
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#include <Library/PrintLib.h>
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#include <ConfigVars.h>
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#define SMB_IS_DIGIT(c) (((c) >= '0') && ((c) <= '9'))
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STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol;
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/***********************************************************************
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SMBIOS data definition TYPE0 BIOS Information
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************************************************************************/
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SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = {
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{ EFI_SMBIOS_TYPE_BIOS_INFORMATION, sizeof (SMBIOS_TABLE_TYPE0), 0 },
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1, // Vendor String
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2, // BiosVersion String
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(UINT16) (FixedPcdGet32 (PcdFdBaseAddress) / 0x10000), // BiosSegment
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3, // BiosReleaseDate String
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(UINT8) (FixedPcdGet32 (PcdFdSize) / 0x10000), // BiosSize (in 64KB)
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{ // BiosCharacteristics
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0, // Reserved :2; ///< Bits 0-1.
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0, // Unknown :1;
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0, // BiosCharacteristicsNotSupported :1;
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0, // IsaIsSupported :1;
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0, // McaIsSupported :1;
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0, // EisaIsSupported :1;
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0, // PciIsSupported :1; /// No PCIe support since we hide ECAM from the OS
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0, // PcmciaIsSupported :1;
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0, // PlugAndPlayIsSupported :1;
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0, // ApmIsSupported :1;
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1, // BiosIsUpgradable :1;
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0, // BiosShadowingAllowed :1;
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0, // VlVesaIsSupported :1;
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0, // EscdSupportIsAvailable :1;
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0, // BootFromCdIsSupported :1;
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1, // SelectableBootIsSupported :1;
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0, // RomBiosIsSocketed :1;
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0, // BootFromPcmciaIsSupported :1;
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0, // EDDSpecificationIsSupported :1;
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0, // JapaneseNecFloppyIsSupported :1;
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0, // JapaneseToshibaFloppyIsSupported :1;
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0, // Floppy525_360IsSupported :1;
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0, // Floppy525_12IsSupported :1;
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0, // Floppy35_720IsSupported :1;
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0, // Floppy35_288IsSupported :1;
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0, // PrintScreenIsSupported :1;
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0, // Keyboard8042IsSupported :1;
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0, // SerialIsSupported :1;
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0, // PrinterIsSupported :1;
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0, // CgaMonoIsSupported :1;
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0, // NecPc98 :1;
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0 // ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
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///< and bits 48-63 reserved for System Vendor.
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},
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{ // BIOSCharacteristicsExtensionBytes[]
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0x01, // AcpiIsSupported :1;
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// UsbLegacyIsSupported :1;
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// AgpIsSupported :1;
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// I2OBootIsSupported :1;
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// Ls120BootIsSupported :1;
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// AtapiZipDriveBootIsSupported :1;
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// Boot1394IsSupported :1;
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// SmartBatteryIsSupported :1;
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// BIOSCharacteristicsExtensionBytes[1]
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0x0c, // BiosBootSpecIsSupported :1;
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// FunctionKeyNetworkBootIsSupported :1;
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// TargetContentDistributionEnabled :1;
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// UefiSpecificationSupported :1;
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// VirtualMachineSupported :1;
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// ExtensionByte2Reserved :3;
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},
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0, // SystemBiosMajorRelease
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0, // SystemBiosMinorRelease
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0, // EmbeddedControllerFirmwareMajorRelease
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0, // EmbeddedControllerFirmwareMinorRelease
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{ (UINT16) ((FixedPcdGet32 (PcdFdSize) + FixedPcdGet32 (PcdFdtSize)) / 0x100000) }, // BiosSize (in MB since Bits 15:14 = 00b)
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};
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CHAR8 mBiosVendor[128] = "EDK2";
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CHAR8 mBiosVersion[128] = "EDK2-DEV";
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CHAR8 mBiosDate[12] = "00/00/0000";
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CHAR8 *mBIOSInfoType0Strings[] = {
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mBiosVendor, // Vendor
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mBiosVersion, // Version
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mBiosDate, // Release Date
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NULL
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};
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/***********************************************************************
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SMBIOS data definition TYPE1 System Information
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************************************************************************/
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SMBIOS_TABLE_TYPE1 mSysInfoType1 = {
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{ EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, sizeof (SMBIOS_TABLE_TYPE1), 0 },
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1, // Manufacturer String
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2, // ProductName String
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3, // Version String
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4, // SerialNumber String
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{ 0x25EF0280, 0xEC82, 0x42B0, { 0x8F, 0xB6, 0x10, 0xAD, 0xCC, 0xC6, 0x7C, 0x02 } },
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SystemWakeupTypePowerSwitch,
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5, // SKUNumber String
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6, // Family String
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};
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CHAR8 mSysInfoManufName[128];
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CHAR8 mSysInfoProductName[128];
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CHAR8 mSysInfoVersionName[128];
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CHAR8 mSysInfoSerial[sizeof (UINT64) * 2 + 1];
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CHAR8 mSysInfoSKU[sizeof (UINT64) * 2 + 1];
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CHAR8 *mSysInfoType1Strings[] = {
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"Raspberry Pi Foundation",
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mSysInfoProductName,
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mSysInfoVersionName,
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mSysInfoSerial,
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mSysInfoSKU,
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"Raspberry Pi",
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NULL
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};
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/***********************************************************************
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SMBIOS data definition TYPE2 Board Information
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************************************************************************/
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SMBIOS_TABLE_TYPE2 mBoardInfoType2 = {
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{ EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, sizeof (SMBIOS_TABLE_TYPE2), 0 },
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1, // Manufacturer String
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2, // ProductName String
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3, // Version String
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4, // SerialNumber String
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5, // AssetTag String
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{ // FeatureFlag
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1, // Motherboard :1;
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0, // RequiresDaughterCard :1;
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0, // Removable :1;
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0, // Replaceable :1;
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0, // HotSwappable :1;
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0, // Reserved :3;
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},
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6, // LocationInChassis String
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0, // ChassisHandle;
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BaseBoardTypeMotherBoard, // BoardType;
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0, // NumberOfContainedObjectHandles;
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{ 0 } // ContainedObjectHandles[1];
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};
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CHAR8 mChassisAssetTag[128];
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CHAR8 *mBoardInfoType2Strings[] = {
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mSysInfoManufName,
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mSysInfoProductName,
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mSysInfoVersionName,
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mSysInfoSerial,
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mChassisAssetTag,
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"Internal",
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NULL
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};
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/***********************************************************************
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SMBIOS data definition TYPE3 Enclosure Information
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************************************************************************/
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SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = {
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{ EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, sizeof (SMBIOS_TABLE_TYPE3), 0 },
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1, // Manufacturer String
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MiscChassisEmbeddedPc, // Type;
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2, // Version String
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3, // SerialNumber String
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4, // AssetTag String
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ChassisStateSafe, // BootupState;
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ChassisStateSafe, // PowerSupplyState;
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ChassisStateSafe, // ThermalState;
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ChassisSecurityStatusNone,// SecurityStatus;
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{ 0, 0, 0, 0 }, // OemDefined[4];
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0, // Height;
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1, // NumberofPowerCords;
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0, // ContainedElementCount;
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0, // ContainedElementRecordLength;
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{ { 0 } }, // ContainedElements[1];
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};
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CHAR8 *mEnclosureInfoType3Strings[] = {
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mSysInfoManufName,
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mSysInfoProductName,
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mSysInfoSerial,
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mChassisAssetTag,
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NULL
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};
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/***********************************************************************
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SMBIOS data definition TYPE4 Processor Information
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************************************************************************/
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SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = {
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{ EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE4), 0},
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1, // Socket String
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CentralProcessor, // ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.
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ProcessorFamilyIndicatorFamily2, // ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY2_DATA.
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2, // ProcessorManufacture String;
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{ // ProcessorId;
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{ 0x00, 0x00, 0x00, 0x00 },
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{ 0x00, 0x00, 0x00, 0x00 }
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},
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3, // ProcessorVersion String;
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{ // Voltage;
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1, // ProcessorVoltageCapability5V :1;
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1, // ProcessorVoltageCapability3_3V :1;
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1, // ProcessorVoltageCapability2_9V :1;
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0, // ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
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0, // ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
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0 // ProcessorVoltageIndicateLegacy :1;
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},
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0, // ExternalClock;
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0, // MaxSpeed;
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0, // CurrentSpeed;
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0x41, // Status;
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ProcessorUpgradeNone, // ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.
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0xFFFF, // L1CacheHandle;
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0xFFFF, // L2CacheHandle;
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0xFFFF, // L3CacheHandle;
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0, // SerialNumber;
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0, // AssetTag;
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0, // PartNumber;
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4, // CoreCount;
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4, // EnabledCoreCount;
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4, // ThreadCount;
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0x6C, // ProcessorCharacteristics; ///< The enumeration value from PROCESSOR_CHARACTERISTIC_FLAGS
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// ProcessorReserved1 :1;
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// ProcessorUnknown :1;
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// Processor64BitCapble :1;
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// ProcessorMultiCore :1;
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// ProcessorHardwareThread :1;
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// ProcessorExecuteProtection :1;
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// ProcessorEnhancedVirtualization :1;
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// ProcessorPowerPerformanceCtrl :1;
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// Processor128bitCapble :1;
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// ProcessorReserved2 :7;
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ProcessorFamilyARM, // ARM Processor Family;
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0, // CoreCount2;
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0, // EnabledCoreCount2;
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0, // ThreadCount2;
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};
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CHAR8 mCpuName[128] = "Unknown ARM CPU";
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CHAR8 *mProcessorInfoType4Strings[] = {
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"Socket",
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"Broadcom",
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mCpuName,
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NULL
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};
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/***********************************************************************
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SMBIOS data definition TYPE7 Cache Information
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************************************************************************/
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SMBIOS_TABLE_TYPE7 mCacheInfoType7_L1I = {
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{ EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 },
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1, // SocketDesignation String
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0x380, // Cache Configuration
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//Cache Level :3 (L1)
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//Cache Socketed :1 (Not Socketed)
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//Reserved :1
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//Location :2 (Internal)
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//Enabled/Disabled :1 (Enabled)
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//Operational Mode :2 (Unknown)
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//Reserved :6
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#if (RPI_MODEL == 4)
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0x0030, // Maximum Size (RPi4: 48KB)
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0x0030, // Install Size (RPi4: 48KB)
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#else
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0x0010, // Maximum Size (RPi3: 16KB)
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0x0010, // Install Size (RPi3: 16KB)
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#endif
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{ // Supported SRAM Type
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0, //Other :1
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0, //Unknown :1
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0, //NonBurst :1
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1, //Burst :1
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0, //PiplelineBurst :1
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1, //Synchronous :1
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0, //Asynchronous :1
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0 //Reserved :9
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},
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{ // Current SRAM Type
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0, //Other :1
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0, //Unknown :1
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0, //NonBurst :1
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1, //Burst :1
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0, //PiplelineBurst :1
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1, //Synchronous :1
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0, //Asynchronous :1
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0 //Reserved :9
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},
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0, // Cache Speed unknown
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CacheErrorParity, // Error Correction
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CacheTypeInstruction, // System Cache Type
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CacheAssociativity2Way // Associativity (RPi4 L1 Instruction cache is 3-way set associative, but SMBIOS spec does not define that)
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};
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CHAR8 *mCacheInfoType7Strings_L1I[] = {
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"L1 Instruction",
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NULL
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};
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SMBIOS_TABLE_TYPE7 mCacheInfoType7_L1D = {
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{ EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 },
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1, // SocketDesignation String
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0x180, // Cache Configuration
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//Cache Level :3 (L1)
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//Cache Socketed :1 (Not Socketed)
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//Reserved :1
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//Location :2 (Internal)
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//Enabled/Disabled :1 (Enabled)
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//Operational Mode :2 (WB)
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//Reserved :6
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#if (RPI_MODEL == 4)
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0x0020, // Maximum Size (RPi4: 32KB)
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0x0020, // Install Size (RPi4: 32KB)
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#else
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0x0010, // Maximum Size (RPi3: 16KB)
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0x0010, // Install Size (RPi3: 16KB)
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#endif
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{ // Supported SRAM Type
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0, //Other :1
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0, //Unknown :1
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0, //NonBurst :1
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1, //Burst :1
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0, //PiplelineBurst :1
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1, //Synchronous :1
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0, //Asynchronous :1
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0 //Reserved :9
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},
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{ // Current SRAM Type
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0, //Other :1
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0, //Unknown :1
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0, //NonBurst :1
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1, //Burst :1
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0, //PiplelineBurst :1
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1, //Synchronous :1
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0, //Asynchronous :1
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0 //Reserved :9
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},
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0, // Cache Speed unknown
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CacheErrorSingleBit, // Error Correction
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CacheTypeData, // System Cache Type
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#if (RPI_MODEL == 4)
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CacheAssociativity2Way // Associativity
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#else
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CacheAssociativity4Way // Associativity
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#endif
|
};
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CHAR8 *mCacheInfoType7Strings_L1D[] = {
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"L1 Data",
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NULL
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};
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SMBIOS_TABLE_TYPE7 mCacheInfoType7_L2 = {
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{ EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 },
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1, // SocketDesignation String
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0x0181, // Cache Configuration
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//Cache Level :3 (L2)
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//Cache Socketed :1 (Not Socketed)
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//Reserved :1
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//Location :2 (Internal)
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//Enabled/Disabled :1 (Enabled)
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//Operational Mode :2 (WB)
|
//Reserved :6
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#if (RPI_MODEL == 4)
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0x0400, // Maximum Size (RPi4: 1MB)
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0x0400, // Install Size (RPi4: 1MB)
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#else
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0x0200, // Maximum Size (RPi3: 512KB)
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0x0200, // Install Size (RPi3: 512KB)
|
#endif
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{ // Supported SRAM Type
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0, //Other :1
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0, //Unknown :1
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0, //NonBurst :1
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1, //Burst :1
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0, //PiplelineBurst :1
|
1, //Synchronous :1
|
0, //Asynchronous :1
|
0 //Reserved :9
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},
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{ // Current SRAM Type
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0, //Other :1
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0, //Unknown :1
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0, //NonBurst :1
|
1, //Burst :1
|
0, //PiplelineBurst :1
|
1, //Synchronous :1
|
0, //Asynchronous :1
|
0 //Reserved :9
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},
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0, // Cache Speed unknown
|
CacheErrorSingleBit, // Error Correction Multi
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CacheTypeUnified, // System Cache Type
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CacheAssociativity16Way // Associativity
|
};
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CHAR8 *mCacheInfoType7Strings_L2[] = {
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"L2",
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NULL
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};
|
/***********************************************************************
|
SMBIOS data definition TYPE9 System Slot Information
|
************************************************************************/
|
SMBIOS_TABLE_TYPE9 mSysSlotInfoType9 = {
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{ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, sizeof (SMBIOS_TABLE_TYPE9), 0 },
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1, // SlotDesignation String
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SlotTypeOther, // SlotType; ///< The enumeration value from MISC_SLOT_TYPE.
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SlotDataBusWidthOther, // SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.
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SlotUsageAvailable, // CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.
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SlotLengthOther, // SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.
|
0, // SlotID;
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{ // SlotCharacteristics1;
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1, // CharacteristicsUnknown :1;
|
0, // Provides50Volts :1;
|
0, // Provides33Volts :1;
|
0, // SharedSlot :1;
|
0, // PcCard16Supported :1;
|
0, // CardBusSupported :1;
|
0, // ZoomVideoSupported :1;
|
0, // ModemRingResumeSupported:1;
|
},
|
{ // SlotCharacteristics2;
|
0, // PmeSignalSupported :1;
|
0, // HotPlugDevicesSupported :1;
|
0, // SmbusSignalSupported :1;
|
0, // Reserved :5; ///< Set to 0.
|
},
|
0xFFFF, // SegmentGroupNum;
|
0xFF, // BusNum;
|
0xFF, // DevFuncNum;
|
};
|
CHAR8 *mSysSlotInfoType9Strings[] = {
|
"SD Card",
|
NULL
|
};
|
|
|
/***********************************************************************
|
SMBIOS data definition TYPE 11 OEM Strings
|
************************************************************************/
|
|
SMBIOS_TABLE_TYPE11 mOemStringsType11 = {
|
{ EFI_SMBIOS_TYPE_OEM_STRINGS, sizeof (SMBIOS_TABLE_TYPE11), 0 },
|
1 // StringCount
|
};
|
CHAR8 *mOemStringsType11Strings[] = {
|
"https://github/tianocore/edk2-platforms/Platform/RaspberryPi/",
|
NULL
|
};
|
|
/***********************************************************************
|
SMBIOS data definition TYPE16 Physical Memory ArrayInformation
|
************************************************************************/
|
SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = {
|
{ EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, sizeof (SMBIOS_TABLE_TYPE16), 0 },
|
MemoryArrayLocationSystemBoard, // Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.
|
MemoryArrayUseSystemMemory, // Use; ///< The enumeration value from MEMORY_ARRAY_USE.
|
MemoryErrorCorrectionUnknown, // MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.
|
0x00000000, // MaximumCapacity;
|
0xFFFE, // MemoryErrorInformationHandle;
|
1, // NumberOfMemoryDevices;
|
0x00000000ULL, // ExtendedMaximumCapacity;
|
};
|
CHAR8 *mPhyMemArrayInfoType16Strings[] = {
|
NULL
|
};
|
|
/***********************************************************************
|
SMBIOS data definition TYPE17 Memory Device Information
|
************************************************************************/
|
SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = {
|
{ EFI_SMBIOS_TYPE_MEMORY_DEVICE, sizeof (SMBIOS_TABLE_TYPE17), 0 },
|
0, // MemoryArrayHandle; // Should match SMBIOS_TABLE_TYPE16.Handle, initialized at runtime, refer to PhyMemArrayInfoUpdateSmbiosType16()
|
0xFFFE, // MemoryErrorInformationHandle; (not provided)
|
0xFFFF, // TotalWidth; (unknown)
|
0xFFFF, // DataWidth; (unknown)
|
0xFFFF, // Size; // When bit 15 is 0: Size in MB
|
// When bit 15 is 1: Size in KB, and continues in ExtendedSize
|
// initialized at runtime, refer to PhyMemArrayInfoUpdateSmbiosType16()
|
MemoryFormFactorChip, // FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.
|
0, // DeviceSet;
|
1, // DeviceLocator String
|
0, // BankLocator String
|
#if (RPI_MODEL == 4)
|
MemoryTypeLpddr4, // MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.
|
#else
|
MemoryTypeLpddr2, // MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.
|
#endif
|
{ // TypeDetail;
|
0, // Reserved :1;
|
0, // Other :1;
|
1, // Unknown :1;
|
0, // FastPaged :1;
|
0, // StaticColumn :1;
|
0, // PseudoStatic :1;
|
0, // Rambus :1;
|
0, // Synchronous :1;
|
0, // Cmos :1;
|
0, // Edo :1;
|
0, // WindowDram :1;
|
0, // CacheDram :1;
|
0, // Nonvolatile :1;
|
0, // Registered :1;
|
0, // Unbuffered :1;
|
0, // Reserved1 :1;
|
},
|
0, // Speed; (unknown)
|
2, // Manufacturer String
|
0, // SerialNumber String
|
0, // AssetTag String
|
0, // PartNumber String
|
0, // Attributes; (unknown rank)
|
0, // ExtendedSize; (since Size < 32GB-1)
|
0, // ConfiguredMemoryClockSpeed; (unknown)
|
0, // MinimumVoltage; (unknown)
|
0, // MaximumVoltage; (unknown)
|
0, // ConfiguredVoltage; (unknown)
|
MemoryTechnologyDram, // MemoryTechnology ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY
|
{{ // MemoryOperatingModeCapability
|
0, // Reserved :1;
|
0, // Other :1;
|
0, // Unknown :1;
|
1, // VolatileMemory :1;
|
0, // ByteAccessiblePersistentMemory :1;
|
0, // BlockAccessiblePersistentMemory :1;
|
0 // Reserved :10;
|
}},
|
0, // FirwareVersion
|
0, // ModuleManufacturerID (unknown)
|
0, // ModuleProductID (unknown)
|
0, // MemorySubsystemControllerManufacturerID (unknown)
|
0, // MemorySubsystemControllerProductID (unknown)
|
0, // NonVolatileSize
|
0xFFFFFFFFFFFFFFFFULL,// VolatileSize // initialized at runtime, refer to PhyMemArrayInfoUpdateSmbiosType16()
|
0, // CacheSize
|
0, // LogicalSize (since MemoryType is not MemoryTypeLogicalNonVolatileDevice)
|
0, // ExtendedSpeed,
|
0 // ExtendedConfiguredMemorySpeed
|
};
|
CHAR8 *mMemDevInfoType17Strings[] = {
|
"SDRAM",
|
"Micron",
|
NULL
|
};
|
|
/***********************************************************************
|
SMBIOS data definition TYPE19 Memory Array Mapped Address Information
|
************************************************************************/
|
SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = {
|
{ EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, sizeof (SMBIOS_TABLE_TYPE19), 0 },
|
0x00000000, // StartingAddress;
|
0x00000000, // EndingAddress;
|
0, // MemoryArrayHandle; // Should match SMBIOS_TABLE_TYPE16.Handle, initialized at runtime, refer to PhyMemArrayInfoUpdateSmbiosType16()
|
1, // PartitionWidth;
|
0, // ExtendedStartingAddress; // not used
|
0, // ExtendedEndingAddress; // not used
|
};
|
CHAR8 *mMemArrMapInfoType19Strings[] = {
|
NULL
|
};
|
|
/***********************************************************************
|
SMBIOS data definition TYPE32 Boot Information
|
************************************************************************/
|
SMBIOS_TABLE_TYPE32 mBootInfoType32 = {
|
{ EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, sizeof (SMBIOS_TABLE_TYPE32), 0 },
|
{ 0, 0, 0, 0, 0, 0 }, // Reserved[6];
|
BootInformationStatusNoError // BootStatus
|
};
|
|
CHAR8 *mBootInfoType32Strings[] = {
|
NULL
|
};
|
|
|
/**
|
|
Create SMBIOS record.
|
|
Converts a fixed SMBIOS structure and an array of pointers to strings into
|
an SMBIOS record where the strings are cat'ed on the end of the fixed record
|
and terminated via a double NULL and add to SMBIOS table.
|
|
SMBIOS_TABLE_TYPE32 gSmbiosType12 = {
|
{ EFI_SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS, sizeof (SMBIOS_TABLE_TYPE12), 0 },
|
1 // StringCount
|
};
|
|
CHAR8 *gSmbiosType12Strings[] = {
|
"Not Found",
|
NULL
|
};
|
|
...
|
|
LogSmbiosData (
|
(EFI_SMBIOS_TABLE_HEADER*)&gSmbiosType12,
|
gSmbiosType12Strings
|
);
|
|
@param Template Fixed SMBIOS structure, required.
|
@param StringPack Array of strings to convert to an SMBIOS string pack.
|
NULL is OK.
|
@param DataSmbiosHandle The new SMBIOS record handle.
|
NULL is OK.
|
**/
|
|
EFI_STATUS
|
EFIAPI
|
LogSmbiosData (
|
IN EFI_SMBIOS_TABLE_HEADER *Template,
|
IN CHAR8 **StringPack,
|
OUT EFI_SMBIOS_HANDLE *DataSmbiosHandle
|
)
|
{
|
EFI_STATUS Status;
|
EFI_SMBIOS_PROTOCOL *Smbios;
|
EFI_SMBIOS_HANDLE SmbiosHandle;
|
EFI_SMBIOS_TABLE_HEADER *Record;
|
UINTN Index;
|
UINTN StringSize;
|
UINTN Size;
|
CHAR8 *Str;
|
|
//
|
// Locate Smbios protocol.
|
//
|
Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID**)&Smbios);
|
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
|
// Calculate the size of the fixed record and optional string pack
|
|
Size = Template->Length;
|
if (StringPack == NULL) {
|
// At least a double null is required
|
Size += 2;
|
} else {
|
for (Index = 0; StringPack[Index] != NULL; Index++) {
|
StringSize = AsciiStrSize (StringPack[Index]);
|
Size += StringSize;
|
}
|
if (StringPack[0] == NULL) {
|
// At least a double null is required
|
Size += 1;
|
}
|
|
// Don't forget the terminating double null
|
Size += 1;
|
}
|
|
// Copy over Template
|
Record = (EFI_SMBIOS_TABLE_HEADER*)AllocateZeroPool (Size);
|
if (Record == NULL) {
|
return EFI_OUT_OF_RESOURCES;
|
}
|
CopyMem (Record, Template, Template->Length);
|
|
// Append string pack
|
Str = ((CHAR8*)Record) + Record->Length;
|
|
for (Index = 0; StringPack[Index] != NULL; Index++) {
|
StringSize = AsciiStrSize (StringPack[Index]);
|
CopyMem (Str, StringPack[Index], StringSize);
|
Str += StringSize;
|
}
|
|
*Str = 0;
|
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
|
Status = Smbios->Add (
|
Smbios,
|
gImageHandle,
|
&SmbiosHandle,
|
Record
|
);
|
|
if ((Status == EFI_SUCCESS) && (DataSmbiosHandle != NULL)) {
|
*DataSmbiosHandle = SmbiosHandle;
|
}
|
|
ASSERT_EFI_ERROR (Status);
|
FreePool (Record);
|
return Status;
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE0 BIOS Information
|
************************************************************************/
|
VOID
|
BIOSInfoUpdateSmbiosType0 (
|
VOID
|
)
|
{
|
UINT32 EpochSeconds = 0;
|
EFI_STATUS Status = EFI_SUCCESS;
|
EFI_TIME Time;
|
INTN i;
|
INTN State = 0;
|
INTN Value[2];
|
INTN Year = TIME_BUILD_YEAR;
|
INTN Month = TIME_BUILD_MONTH;
|
INTN Day = TIME_BUILD_DAY;
|
|
// Populate the Firmware major and minor.
|
Status = mFwProtocol->GetFirmwareRevision (&EpochSeconds);
|
if (EFI_ERROR (Status)) {
|
DEBUG ((DEBUG_ERROR, "Failed to get firmware revision: %r\n", Status));
|
} else {
|
// The firmware revision is really an epoch time which we convert to a
|
// YY.MM major.minor. This is good enough for our purpose, where this
|
// revision is merely provided as a loose indicator of when the
|
// VideoCore firmware was generated.
|
EpochToEfiTime (EpochSeconds, &Time);
|
ASSERT (Time.Year >= 2000 && Time.Year <= 2255);
|
mBIOSInfoType0.EmbeddedControllerFirmwareMajorRelease = (UINT8)(Time.Year - 2000);
|
mBIOSInfoType0.EmbeddedControllerFirmwareMinorRelease = Time.Month;
|
}
|
|
// mBiosVendor and mBiosVersion, which are referenced in mBIOSInfoType0Strings,
|
// are left unchanged if the following calls fail.
|
UnicodeStrToAsciiStrS ((CHAR16*)PcdGetPtr (PcdFirmwareVendor),
|
mBiosVendor, sizeof (mBiosVendor));
|
UnicodeStrToAsciiStrS ((CHAR16*)PcdGetPtr (PcdFirmwareVersionString),
|
mBiosVersion, sizeof (mBiosVersion));
|
ASSERT (Year >= 0 && Year <= 9999);
|
ASSERT (Month >= 1 && Month <= 12);
|
ASSERT (Day >= 1 && Day <= 31);
|
AsciiSPrint (mBiosDate, sizeof (mBiosDate), "%02d/%02d/%04d", Month, Day, Year);
|
|
// Look for a "x.y" numeric string anywhere in mBiosVersion and
|
// try to parse it to populate the BIOS major and minor.
|
for (i = 0; (i < AsciiStrLen (mBiosVersion)) && (State < 4); i++) {
|
switch (State) {
|
case 0:
|
if (!SMB_IS_DIGIT (mBiosVersion[i]))
|
break;
|
Value[0] = Value[1] = 0;
|
State++;
|
// Fall through
|
case 1:
|
case 3:
|
if (SMB_IS_DIGIT (mBiosVersion[i])) {
|
Value[State / 2] = (Value[State / 2] * 10) + (mBiosVersion[i] - '0');
|
if (Value[State / 2] > 255) {
|
while (SMB_IS_DIGIT (mBiosVersion[i + 1]))
|
i++;
|
// Reset our state (we may have something like "Firmware X83737.1 v1.23")
|
State = 0;
|
}
|
} else {
|
State++;
|
}
|
if (State != 2)
|
break;
|
// Fall through
|
case 2:
|
if ((mBiosVersion[i] == '.') && (SMB_IS_DIGIT (mBiosVersion[i + 1]))) {
|
State++;
|
} else {
|
State = 0;
|
}
|
break;
|
}
|
}
|
if ((State == 3) || (State == 4)) {
|
mBIOSInfoType0.SystemBiosMajorRelease = (UINT8)Value[0];
|
mBIOSInfoType0.SystemBiosMinorRelease = (UINT8)Value[1];
|
}
|
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mBIOSInfoType0, mBIOSInfoType0Strings, NULL);
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE1 System Information
|
************************************************************************/
|
VOID
|
I64ToHexString (
|
IN OUT CHAR8* TargetStringSz,
|
IN UINT32 TargetStringSize,
|
IN UINT64 Value
|
)
|
{
|
static CHAR8 ItoH[] = { '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F' };
|
UINT8 StringInx;
|
INT8 NibbleInx;
|
|
ZeroMem ((void*)TargetStringSz, TargetStringSize);
|
|
//
|
// Convert each nibble to hex string, starting from
|
// the highest non-zero nibble.
|
//
|
StringInx = 0;
|
for (NibbleInx = sizeof (UINT64) * 2; NibbleInx > 0; --NibbleInx) {
|
UINT64 NibbleMask = (((UINT64)0xF) << ((NibbleInx - 1) * 4));
|
UINT8 Nibble = (UINT8)((Value & NibbleMask) >> ((NibbleInx - 1) * 4));
|
|
ASSERT (Nibble <= 0xF);
|
|
if (StringInx < (TargetStringSize - 1)) {
|
TargetStringSz[StringInx++] = ItoH[Nibble];
|
} else {
|
break;
|
}
|
}
|
}
|
|
VOID
|
SysInfoUpdateSmbiosType1 (
|
VOID
|
)
|
{
|
UINT32 BoardRevision = 0;
|
EFI_STATUS Status = EFI_SUCCESS;
|
UINT64 BoardSerial = 0;
|
INTN Prod = -1;
|
INTN Manu = -1;
|
|
Status = mFwProtocol->GetModelRevision (&BoardRevision);
|
if (EFI_ERROR (Status)) {
|
DEBUG ((DEBUG_ERROR, "Failed to get board model: %r\n", Status));
|
} else {
|
Prod = (BoardRevision >> 4) & 0xFF;
|
Manu = (BoardRevision >> 16) & 0x0F;
|
}
|
|
AsciiStrCpyS (mSysInfoProductName, sizeof (mSysInfoProductName),
|
mFwProtocol->GetModelName (Prod));
|
AsciiStrCpyS (mSysInfoManufName, sizeof (mSysInfoManufName),
|
mFwProtocol->GetManufacturerName (Manu));
|
AsciiSPrint (mSysInfoVersionName, sizeof (mSysInfoVersionName),
|
"%X", BoardRevision);
|
|
I64ToHexString (mSysInfoSKU, sizeof (mSysInfoSKU), BoardRevision);
|
|
Status = mFwProtocol->GetSerial (&BoardSerial);
|
if (EFI_ERROR (Status)) {
|
DEBUG ((DEBUG_ERROR, "Failed to get board serial: %r\n", Status));
|
}
|
|
I64ToHexString (mSysInfoSerial, sizeof (mSysInfoSerial), BoardSerial);
|
|
DEBUG ((DEBUG_ERROR, "Board Serial Number: %a\n", mSysInfoSerial));
|
|
mSysInfoType1.Uuid.Data1 = BoardRevision;
|
mSysInfoType1.Uuid.Data2 = 0x0;
|
mSysInfoType1.Uuid.Data3 = 0x0;
|
// Swap endianness, so that the serial is more user-friendly as a UUID
|
BoardSerial = SwapBytes64 (BoardSerial);
|
CopyMem (mSysInfoType1.Uuid.Data4, &BoardSerial, sizeof (BoardSerial));
|
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mSysInfoType1, mSysInfoType1Strings, NULL);
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE2 Board Information
|
************************************************************************/
|
VOID
|
BoardInfoUpdateSmbiosType2 (
|
VOID
|
)
|
{
|
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mBoardInfoType2, mBoardInfoType2Strings, NULL);
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE3 Enclosure Information
|
************************************************************************/
|
VOID
|
EnclosureInfoUpdateSmbiosType3 (
|
VOID
|
)
|
{
|
UINTN Size;
|
EFI_STATUS Status;
|
EFI_SMBIOS_HANDLE SmbiosHandle;
|
CHAR16 AssetTagVar[ASSET_TAG_STR_STORAGE_SIZE] = L"";
|
|
Size = sizeof(AssetTagVar);
|
Status = gRT->GetVariable(L"AssetTag",
|
&gConfigDxeFormSetGuid,
|
NULL, &Size, AssetTagVar);
|
if (EFI_ERROR (Status)) {
|
DEBUG ((DEBUG_ERROR, "Failed to get Asset Tag: %r\n", Status));
|
}
|
|
if (AssetTagVar[0] == L'\0') {
|
// SMBIOS referenced strings cannot be NULL. If no AssetTag is set, default to a blank space.
|
UnicodeStrToAsciiStrS(L" ", mChassisAssetTag, sizeof(mChassisAssetTag));
|
} else {
|
UnicodeStrToAsciiStrS(AssetTagVar, mChassisAssetTag, sizeof(mChassisAssetTag));
|
}
|
DEBUG ((DEBUG_INFO, "System Asset Tag : %a\n", mChassisAssetTag));
|
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mEnclosureInfoType3, mEnclosureInfoType3Strings, &SmbiosHandle);
|
|
// Set Type2 ChassisHandle to point to the newly added Type3 handle
|
mBoardInfoType2.ChassisHandle = (UINT16) SmbiosHandle;
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE4 Processor Information
|
************************************************************************/
|
VOID
|
ProcessorInfoUpdateSmbiosType4 (
|
IN UINTN MaxCpus
|
)
|
{
|
EFI_STATUS Status;
|
UINT32 Rate;
|
UINT64 *ProcessorId;
|
|
mProcessorInfoType4.CoreCount = (UINT8)MaxCpus;
|
mProcessorInfoType4.CoreCount2 = (UINT8)MaxCpus;
|
mProcessorInfoType4.EnabledCoreCount = (UINT8)MaxCpus;
|
mProcessorInfoType4.EnabledCoreCount2 = (UINT8)MaxCpus;
|
mProcessorInfoType4.ThreadCount = (UINT8)MaxCpus;
|
mProcessorInfoType4.ThreadCount2 = (UINT8)MaxCpus;
|
|
Status = mFwProtocol->GetMaxClockRate (RPI_MBOX_CLOCK_RATE_ARM, &Rate);
|
if (Status != EFI_SUCCESS) {
|
DEBUG ((DEBUG_ERROR, "Couldn't get the max CPU speed: %r\n", Status));
|
} else {
|
mProcessorInfoType4.MaxSpeed = Rate / 1000000;
|
DEBUG ((DEBUG_INFO, "Max CPU speed: %uHz\n", Rate));
|
}
|
|
Status = mFwProtocol->GetClockRate (RPI_MBOX_CLOCK_RATE_ARM, &Rate);
|
if (Status != EFI_SUCCESS) {
|
DEBUG ((DEBUG_ERROR, "Couldn't get the current CPU speed: %r\n", Status));
|
} else {
|
mProcessorInfoType4.CurrentSpeed = Rate / 1000000;
|
DEBUG ((DEBUG_INFO, "Current CPU speed: %uHz\n", Rate));
|
}
|
|
AsciiStrCpyS (mCpuName, sizeof (mCpuName), mFwProtocol->GetCpuName (-1));
|
|
ProcessorId = (UINT64 *)&(mProcessorInfoType4.ProcessorId);
|
*ProcessorId = ArmReadMidr();
|
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mProcessorInfoType4, mProcessorInfoType4Strings, NULL);
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE7 Cache Information
|
************************************************************************/
|
VOID
|
CacheInfoUpdateSmbiosType7 (
|
VOID
|
)
|
{
|
EFI_SMBIOS_HANDLE SmbiosHandle;
|
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mCacheInfoType7_L1I, mCacheInfoType7Strings_L1I, NULL);
|
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mCacheInfoType7_L1D, mCacheInfoType7Strings_L1D, &SmbiosHandle);
|
// Set Type4 L1CacheHandle to point to the newly added L1 Data Cache
|
mProcessorInfoType4.L1CacheHandle = (UINT16) SmbiosHandle;
|
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mCacheInfoType7_L2, mCacheInfoType7Strings_L2, &SmbiosHandle);
|
// Set Type4 L2CacheHandle to point to the newly added L2 Cache
|
mProcessorInfoType4.L2CacheHandle = (UINT16) SmbiosHandle;
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE9 System Slot Information
|
************************************************************************/
|
VOID
|
SysSlotInfoUpdateSmbiosType9 (
|
VOID
|
)
|
{
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mSysSlotInfoType9, mSysSlotInfoType9Strings, NULL);
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE11 OEM Strings
|
************************************************************************/
|
VOID
|
OemStringsUpdateSmbiosType11 (
|
VOID
|
)
|
{
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mOemStringsType11, mOemStringsType11Strings, NULL);
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE16 Physical Memory Array Information
|
************************************************************************/
|
VOID
|
PhyMemArrayInfoUpdateSmbiosType16 (
|
VOID
|
)
|
{
|
EFI_SMBIOS_HANDLE MemArraySmbiosHandle;
|
EFI_STATUS Status;
|
UINT32 InstalledMB = 0;
|
|
//
|
// Update memory size fields:
|
// - Type 16 MaximumCapacity in KB
|
// - Type 17 size in MB (since bit 15 = 0)
|
// - Type 17 VolatileSize in Bytes
|
//
|
|
// The minimum RAM size used on any Raspberry Pi model is 256 MB
|
mMemDevInfoType17.Size = 256;
|
|
Status = mFwProtocol->GetModelInstalledMB (&InstalledMB);
|
if (Status != EFI_SUCCESS) {
|
DEBUG ((DEBUG_WARN, "Couldn't get the board memory size - defaulting to 256 MB: %r\n", Status));
|
} else {
|
mMemDevInfoType17.Size = InstalledMB; // Size in MB
|
}
|
|
mPhyMemArrayInfoType16.MaximumCapacity = mMemDevInfoType17.Size * 1024; // Size in KB
|
mMemDevInfoType17.VolatileSize = MultU64x32 (mMemDevInfoType17.Size, 1024 * 1024); // Size in Bytes
|
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mPhyMemArrayInfoType16, mPhyMemArrayInfoType16Strings, &MemArraySmbiosHandle);
|
|
//
|
// Update the memory device information and memory array map with the newly added type 16 handle
|
//
|
mMemDevInfoType17.MemoryArrayHandle = MemArraySmbiosHandle;
|
mMemArrMapInfoType19.MemoryArrayHandle = MemArraySmbiosHandle;
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE17 Memory Device Information
|
************************************************************************/
|
VOID
|
MemDevInfoUpdateSmbiosType17 (
|
VOID
|
)
|
{
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mMemDevInfoType17, mMemDevInfoType17Strings, NULL);
|
}
|
|
/***********************************************************************
|
SMBIOS data update TYPE19 Memory Array Map Information
|
************************************************************************/
|
VOID
|
MemArrMapInfoUpdateSmbiosType19 (
|
VOID
|
)
|
{
|
EFI_STATUS Status;
|
UINT32 InstalledMB = 0;
|
|
// Note: Type 19 addresses are expressed in KB, not bytes
|
// The memory layout used in all known Pi SoC's starts at 0
|
mMemArrMapInfoType19.StartingAddress = 0;
|
|
// The minimum RAM size used on any Raspberry Pi model is 256 MB
|
mMemArrMapInfoType19.EndingAddress = 256 * 1024;
|
Status = mFwProtocol->GetModelInstalledMB (&InstalledMB);
|
if (Status != EFI_SUCCESS) {
|
DEBUG ((DEBUG_WARN, "Couldn't get the board memory size - defaulting to 256 MB: %r\n", Status));
|
} else {
|
if (PcdGet32 (PcdRamMoreThan3GB) && PcdGet32 (PcdRamLimitTo3GB)) {
|
ASSERT (InstalledMB > 3 * 1024);
|
mMemArrMapInfoType19.EndingAddress = 3 * 1024 * 1024;
|
} else {
|
mMemArrMapInfoType19.EndingAddress = InstalledMB * 1024;
|
}
|
}
|
mMemArrMapInfoType19.EndingAddress -= 1;
|
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mMemArrMapInfoType19, mMemArrMapInfoType19Strings, NULL);
|
}
|
|
|
/***********************************************************************
|
SMBIOS data update TYPE32 Boot Information
|
************************************************************************/
|
VOID
|
BootInfoUpdateSmbiosType32 (
|
VOID
|
)
|
{
|
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mBootInfoType32, mBootInfoType32Strings, NULL);
|
}
|
|
/***********************************************************************
|
Driver Entry
|
************************************************************************/
|
EFI_STATUS
|
EFIAPI
|
PlatformSmbiosDriverEntryPoint (
|
IN EFI_HANDLE ImageHandle,
|
IN EFI_SYSTEM_TABLE *SystemTable
|
)
|
{
|
EFI_STATUS Status;
|
|
Status = gBS->LocateProtocol (&gRaspberryPiFirmwareProtocolGuid, NULL,
|
(VOID**)&mFwProtocol);
|
ASSERT_EFI_ERROR (Status);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
|
BIOSInfoUpdateSmbiosType0 ();
|
|
SysInfoUpdateSmbiosType1 ();
|
|
EnclosureInfoUpdateSmbiosType3 (); // Add Type 3 first to get chassis handle for use in Type 2
|
|
BoardInfoUpdateSmbiosType2 ();
|
|
CacheInfoUpdateSmbiosType7 (); // Add Type 7 first to get Cache handle for use in Type 4
|
|
ProcessorInfoUpdateSmbiosType4 (4); //One example for creating and updating
|
|
SysSlotInfoUpdateSmbiosType9 ();
|
|
OemStringsUpdateSmbiosType11 ();
|
|
PhyMemArrayInfoUpdateSmbiosType16 ();
|
|
MemDevInfoUpdateSmbiosType17 ();
|
|
MemArrMapInfoUpdateSmbiosType19 ();
|
|
BootInfoUpdateSmbiosType32 ();
|
|
return EFI_SUCCESS;
|
}
|
