/** @file
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*
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* Differentiated System Definition Table (DSDT)
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*
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* Copyright (c) 2020, Pete Batard <pete@akeo.ie>
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* Copyright (c) 2018-2020, Andrey Warkentin <andrey.warkentin@gmail.com>
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* Copyright (c) Microsoft Corporation. All rights reserved.
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* Copyright (c) 2021, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <IndustryStandard/Bcm2711.h>
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#include <IndustryStandard/Bcm2836.h>
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#include <IndustryStandard/Bcm2836Gpio.h>
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#include <IndustryStandard/Bcm2836Gpu.h>
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#include <IndustryStandard/Bcm2836Pwm.h>
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#include <IndustryStandard/Bcm2836Sdio.h>
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#include <IndustryStandard/Bcm2836SdHost.h>
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#include "AcpiTables.h"
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#define BCM_ALT0 0x4
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#define BCM_ALT1 0x5
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#define BCM_ALT2 0x6
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#define BCM_ALT3 0x7
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#define BCM_ALT4 0x3
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#define BCM_ALT5 0x2
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//
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// The ASL compiler does not support argument arithmetic in functions
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// like QWordMemory (). So we need to instantiate dummy qword regions
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// that we can then update the Min, Max and Length attributes of.
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// The three macros below help accomplish this.
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//
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// QWORDMEMORYSET specifies a CPU memory range (whose base address is
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// BCM2836_SOC_REGISTERS + Offset), and QWORDBUSMEMORYSET specifies
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// a VPU memory range (whose base address is provided directly).
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//
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#define QWORDMEMORYBUF(Index) \
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QWordMemory (ResourceProducer,, \
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MinFixed, MaxFixed, NonCacheable, ReadWrite, \
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0x0, 0x0, 0x0, 0x0, 0x1,,, RB ## Index)
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#define QWORDMEMORYSET(Index, Offset, Length) \
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CreateQwordField (RBUF, RB ## Index._MIN, MI ## Index) \
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CreateQwordField (RBUF, RB ## Index._MAX, MA ## Index) \
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CreateQwordField (RBUF, RB ## Index._LEN, LE ## Index) \
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Store (Length, LE ## Index) \
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Add (BCM2836_SOC_REGISTERS, Offset, MI ## Index) \
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Add (MI ## Index, LE ## Index - 1, MA ## Index)
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#define QWORDBUSMEMORYSET(Index, Base, Length) \
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CreateQwordField (RBUF, RB ## Index._MIN, MI ## Index) \
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CreateQwordField (RBUF, RB ## Index._MAX, MA ## Index) \
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CreateQwordField (RBUF, RB ## Index._LEN, LE ## Index) \
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Store (Base, MI ## Index) \
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Store (Length, LE ## Index) \
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Add (MI ## Index, LE ## Index - 1, MA ## Index)
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DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2)
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{
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Scope (\_SB_)
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{
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include ("Pep.asl")
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Device (CPU0)
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{
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Name (_HID, "ACPI0007")
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Name (_UID, 0x0)
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Method (_STA)
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{
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Return (0xf)
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}
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}
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Device (CPU1)
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{
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Name (_HID, "ACPI0007")
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Name (_UID, 0x1)
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Method (_STA)
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{
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Return (0xf)
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}
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}
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Device (CPU2)
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{
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Name (_HID, "ACPI0007")
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Name (_UID, 0x2)
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Method (_STA)
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{
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Return (0xf)
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}
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}
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Device (CPU3)
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{
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Name (_HID, "ACPI0007")
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Name (_UID, 0x3)
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Method (_STA)
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{
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Return (0xf)
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}
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}
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//
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// GPU device container describes the DMA translation required
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// when a device behind the GPU wants to access Arm memory.
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// Only the first GB can be addressed.
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//
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Device (GDV0)
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{
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Name (_HID, "ACPI0004")
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Name (_UID, 0x1)
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Name (_CCA, 0x0)
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Method (_CRS, 0, Serialized) {
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//
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// Container devices with _DMA must have _CRS, meaning GDV0
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// to provide all resources that GpuDevs.asl consume (except
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// interrupts).
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//
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Name (RBUF, ResourceTemplate () {
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QWORDMEMORYBUF(01)
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QWORDMEMORYBUF(02)
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QWORDMEMORYBUF(03)
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// QWORDMEMORYBUF(04)
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// QWORDMEMORYBUF(05)
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QWORDMEMORYBUF(06)
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QWORDMEMORYBUF(07)
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QWORDMEMORYBUF(08)
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QWORDMEMORYBUF(09)
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QWORDMEMORYBUF(10)
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QWORDMEMORYBUF(11)
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QWORDMEMORYBUF(12)
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QWORDMEMORYBUF(13)
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QWORDMEMORYBUF(14)
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QWORDMEMORYBUF(15)
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// QWORDMEMORYBUF(16)
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QWORDMEMORYBUF(17)
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QWORDMEMORYBUF(18)
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QWORDMEMORYBUF(19)
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QWORDMEMORYBUF(20)
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QWORDMEMORYBUF(21)
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QWORDMEMORYBUF(22)
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QWORDMEMORYBUF(23)
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QWORDMEMORYBUF(24)
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QWORDMEMORYBUF(25)
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})
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// USB
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QWORDMEMORYSET(01, BCM2836_USB_OFFSET, BCM2836_USB_LENGTH)
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// GPU
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QWORDMEMORYSET(02, BCM2836_V3D_BUS_OFFSET, BCM2836_V3D_BUS_LENGTH)
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QWORDMEMORYSET(03, BCM2836_HVS_OFFSET, BCM2836_HVS_LENGTH)
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// QWORDMEMORYSET(04, BCM2836_PV0_OFFSET, BCM2836_PV0_LENGTH)
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// QWORDMEMORYSET(05, BCM2836_PV1_OFFSET, BCM2836_PV1_LENGTH)
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QWORDMEMORYSET(06, BCM2836_PV2_OFFSET, BCM2836_PV2_LENGTH)
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QWORDMEMORYSET(07, BCM2836_HDMI0_OFFSET, BCM2836_HDMI0_LENGTH)
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QWORDMEMORYSET(08, BCM2836_HDMI1_OFFSET, BCM2836_HDMI1_LENGTH)
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// Mailbox
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QWORDMEMORYSET(09, BCM2836_MBOX_OFFSET, BCM2836_MBOX_LENGTH)
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// VCHIQ
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QWORDMEMORYSET(10, BCM2836_VCHIQ_OFFSET, BCM2836_VCHIQ_LENGTH)
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// GPIO
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QWORDMEMORYSET(11, GPIO_OFFSET, GPIO_LENGTH)
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// I2C
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QWORDMEMORYSET(12, BCM2836_I2C1_OFFSET, BCM2836_I2C1_LENGTH)
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QWORDMEMORYSET(13, BCM2836_I2C2_OFFSET, BCM2836_I2C2_LENGTH)
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// SPI
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QWORDMEMORYSET(14, BCM2836_SPI0_OFFSET, BCM2836_SPI0_LENGTH)
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QWORDMEMORYSET(15, BCM2836_SPI1_OFFSET, BCM2836_SPI1_LENGTH)
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// QWORDMEMORYSET(16, BCM2836_SPI2_OFFSET, BCM2836_SPI2_LENGTH)
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// PWM
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QWORDMEMORYSET(17, BCM2836_PWM_DMA_OFFSET, BCM2836_PWM_DMA_LENGTH)
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QWORDMEMORYSET(18, BCM2836_PWM_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH)
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QWORDBUSMEMORYSET(19, BCM2836_PWM_BUS_BASE_ADDRESS, BCM2836_PWM_BUS_LENGTH)
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QWORDBUSMEMORYSET(20, BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS, BCM2836_PWM_CTRL_UNCACHED_LENGTH)
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QWORDMEMORYSET(21, BCM2836_PWM_CLK_OFFSET, BCM2836_PWM_CLK_LENGTH)
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// UART
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QWORDMEMORYSET(22, BCM2836_PL011_UART_OFFSET, BCM2836_PL011_UART_LENGTH)
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QWORDMEMORYSET(23, BCM2836_MINI_UART_OFFSET, BCM2836_MINI_UART_LENGTH)
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// SDC
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QWORDMEMORYSET(24, MMCHS1_OFFSET, MMCHS1_LENGTH)
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QWORDMEMORYSET(25, SDHOST_OFFSET, SDHOST_LENGTH)
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Return (RBUF)
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}
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Name (_DMA, ResourceTemplate() {
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//
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// Only the first GB is available.
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// Bus 0xC0000000 -> CPU 0x00000000.
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//
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QWordMemory (ResourceProducer,
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,
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MinFixed,
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MaxFixed,
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NonCacheable,
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ReadWrite,
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0x0,
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0x00000000C0000000, // MIN
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0x00000000FFFFFFFF, // MAX
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0xFFFFFFFF40000000, // TRA
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0x0000000040000000, // LEN
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,
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,
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)
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})
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include ("GpuDevs.asl")
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}
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#if (RPI_MODEL == 4)
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Device (ETH0)
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{
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Name (_HID, "BCM6E4E")
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Name (_CID, "BCM6E4E")
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Name (_UID, 0x0)
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Name (_CCA, 0x0)
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Method (_STA)
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{
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Return (0xf)
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}
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Method (_CRS, 0x0, Serialized)
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{
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Name (RBUF, ResourceTemplate ()
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{
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// No need for MEMORY32SETBASE on Genet as we have a straight base address constant
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MEMORY32FIXED (ReadWrite, GENET_BASE_ADDRESS, GENET_LENGTH, )
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Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { GENET_INTERRUPT0, GENET_INTERRUPT1 }
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})
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Return (RBUF)
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}
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Name (_DSD, Package () {
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ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
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Package () {
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Package () { "brcm,max-dma-burst-size", 0x08 },
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Package () { "phy-mode", "rgmii-rxid" },
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}
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})
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}
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// Define a simple thermal zone. The idea here is we compute the SOC temp
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// via a register we can read, and give it to the OS. This enables basic
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// reports from the "sensors" utility, and the OS can then poll and take
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// actions if that temp exceeds any of the given thresholds.
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Device (EC00)
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{
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Name (_HID, EISAID ("PNP0C06"))
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Name (_CCA, 0x0)
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// all temps in are tenths of K (aka 2732 is the min temps in Linux (aka 0C))
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ThermalZone (TZ00) {
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Method (_TMP, 0, Serialized) {
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OperationRegion (TEMS, SystemMemory, THERM_SENSOR, 0x8)
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Field (TEMS, DWordAcc, NoLock, Preserve) {
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TMPS, 32
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}
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return (((410040 - ((TMPS & 0x3ff) * 487)) / 100) + 2732);
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}
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Method (_SCP, 3) { } // receive cooling policy from OS
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Method (_CRT) { Return (3632) } // (90C) Critical temp point (immediate power-off)
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Method (_HOT) { Return (3582) } // (85C) HOT state where OS should hibernate
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Method (_PSV) { Return (3532) } // (80C) Passive cooling (CPU throttling) trip point
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// SSDT inserts _AC0/_AL0 @60C here, if a FAN is configured
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Name (_TZP, 10) //The OSPM must poll this device every 1 seconds
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Name (_PSL, Package () { \_SB_.CPU0, \_SB_.CPU1, \_SB_.CPU2, \_SB_.CPU3 })
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}
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}
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#endif
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}
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}
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