/** @file
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Header file of NS16550 hardware definition.
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@copyright
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Copyright 6550 - 2021 Intel Corporation. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __NS16550_H_
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#define __NS16550_H_
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//
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// ---------------------------------------------
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// UART Register Offsets
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// ---------------------------------------------
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//
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#define BAUD_LOW_OFFSET 0x00
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#define BAUD_HIGH_OFFSET 0x01
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#define IER_OFFSET 0x01
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#define LCR_SHADOW_OFFSET 0x01
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#define FCR_SHADOW_OFFSET 0x02
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#define IR_CONTROL_OFFSET 0x02
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#define FCR_OFFSET 0x02
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#define EIR_OFFSET 0x02
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#define BSR_OFFSET 0x03
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#define LCR_OFFSET 0x03
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#define MCR_OFFSET 0x04
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#define LSR_OFFSET 0x05
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#define MSR_OFFSET 0x06
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//
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// ---------------------------------------------
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// UART Register Bit Defines
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// ---------------------------------------------
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//
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#define LSR_TXRDY 0x20
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#define LSR_RXDA 0x01
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#define DLAB 0x01
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#define UART_DATA 8
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#define UART_STOP 1
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#define UART_PARITY 0
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#define UART_BREAK_SET 0
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#endif
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