/** @file
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This protocol is EFI compatible.
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@copyright
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Copyright 2005 - 2021 Intel Corporation. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _DXE_SYSTEM_BOARD_H_
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#define _DXE_SYSTEM_BOARD_H_
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#include <PlatPirqData.h>
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#include <PlatDevData.h>
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#include <Ppi/PchPolicy.h>
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#define PCI_DEVICE_NUMBER_IMC0_CH_0 0x08
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#define PCI_FUNCTION_NUMBER_IMC0_CH_0 0
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#define PCI_DEVICE_ID_IMC0_CH_0 0x2014
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#define BIOSGUARD_SUPPORT_ENABLED BIT0
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#define OC_SUPPORT_ENABLED BIT1
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#ifndef __AML_OFFSET_TABLE_H
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#define __AML_OFFSET_TABLE_H
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typedef struct {
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char *Pathname; /* Full pathname (from root) to the object */
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unsigned short ParentOpcode; /* AML opcode for the parent object */
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unsigned long NamesegOffset; /* Offset of last nameseg in the parent namepath */
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unsigned char Opcode; /* AML opcode for the data */
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unsigned long Offset; /* Offset for the data */
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unsigned long long Value; /* Original value of the data (as applicable) */
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} AML_OFFSET_TABLE_ENTRY;
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#endif
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//
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// Global variables for Option ROMs
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//
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#define NULL_ROM_FILE_GUID \
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{ \
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0x00000000, 0x0000, 0x0000, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } \
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}
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typedef struct {
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EFI_GUID FileName;
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UINTN Segment;
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UINTN Bus;
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UINTN Device;
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UINTN Function;
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UINT16 VendorId;
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UINT16 DeviceId;
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} PCI_OPTION_ROM_TABLE;
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//
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// System board information table
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//
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typedef struct {
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//
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// Pci option ROM data
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//
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PCI_OPTION_ROM_TABLE *PciOptionRomTable;
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//
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// System CPU data
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//
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UINT32 CpuSocketCount;
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//
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// System device and irq routing data
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//
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DEVICE_DATA *DeviceData;
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PLATFORM_PIRQ_DATA *SystemPirqData;
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} DXE_SYSTEM_BOARD_INFO;
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#endif
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