/** @file
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Simics Platform definitions
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Copyright (C) 2015, Red Hat, Inc.
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Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>
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Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __SIMICS_PLATFORMS_H__
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#define __SIMICS_PLATFORMS_H__
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#include <Library/PciLib.h>
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#include <IndustryStandard/Pci22.h>
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#include <Register/X58Ich10.h>
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#include <IndustryStandard/I440FxPiix4.h>
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//
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// Simics Host Bridge DID Address
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//
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#define SIMICS_HOSTBRIDGE_DID \
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PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)
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//
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// Simics SideBand PCI device registers
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//
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#define SIMICS_SIDEBANDPCI_DEV 0
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#define SIMICS_SIDEBANDPCI_FUNC 7
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#define SIMICS_SIDEBANDPCI_SVID \
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PCI_LIB_ADDRESS (0, 0, 7, PCI_SVID_OFFSET)
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#define SIMICS_SIDEBANDPCI_SDID \
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PCI_LIB_ADDRESS (0, 0, 7, PCI_SID_OFFSET)
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#define SIMICS_SIDEBANDPCI_CAP \
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PCI_LIB_ADDRESS (0, 0, 7, PCI_CAPBILITY_POINTER_OFFSET)
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#define SIMICS_SIDEBANDPCI_CAP_Offset 0x40
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#define SIMICS_SIDEBANDPCI_CAP_ID 0xFF
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//
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// Values we program into the PM base address registers
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//
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#define PIIX4_PMBA_VALUE 0xB000
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#define ICH10_PMBASE_VALUE 0x0400
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//
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// Common bits in same-purpose registers
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//
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#define PMBA_RTE BIT0
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//
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// Common IO ports relative to the Power Management Base Address
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//
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#define ACPI_TIMER_OFFSET 0x8
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#endif
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