/** @file
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Copyright (c) 2018 - 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "BoardAcpiDxe.h"
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EFI_STATUS
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PatchDsdtTable (
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IN OUT EFI_ACPI_COMMON_HEADER *Table
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);
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#pragma optimize("",off)
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BIOS_ACPI_PARAM *mAcpiParameter;
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EFI_IIO_UDS_PROTOCOL *mIioUds;
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UINT32 mNumOfBitShift;
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BOOLEAN mForceX2ApicId;
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BOOLEAN mX2ApicEnabled;
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struct SystemMemoryMapHob *mSystemMemoryMap;
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SOCKET_MP_LINK_CONFIGURATION mSocketMpLinkConfiguration;
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SOCKET_IIO_CONFIGURATION mSocketIioConfiguration;
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SOCKET_POWERMANAGEMENT_CONFIGURATION mSocketPowermanagementConfiguration;
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BOOLEAN mFirstNotify;
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PCH_RC_CONFIGURATION mPchRcConfiguration;
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UINT8 mKBPresent = 0;
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UINT8 mMousePresent = 0;
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/**
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Locate the first instance of a protocol. If the protocol requested is an
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FV protocol, then it will return the first FV that contains the ACPI table
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storage file.
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@param Protocol - The protocol to find.
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Instance - Return pointer to the first instance of the protocol.
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Type - The type of protocol to locate.
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@retval EFI_SUCCESS - The function completed successfully.
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@retval EFI_NOT_FOUND - The protocol could not be located.
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@retval EFI_OUT_OF_RESOURCES - There are not enough resources to find the protocol.
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**/
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EFI_STATUS
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LocateSupportProtocol (
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IN EFI_GUID *Protocol,
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IN EFI_GUID *gEfiAcpiMultiTableStorageGuid,
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OUT VOID **Instance,
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IN UINT32 Type
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)
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{
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EFI_STATUS Status;
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EFI_HANDLE *HandleBuffer;
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UINTN NumberOfHandles;
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EFI_FV_FILETYPE FileType;
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UINT32 FvStatus;
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EFI_FV_FILE_ATTRIBUTES Attributes;
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UINTN Size;
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UINTN Index;
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FvStatus = 0;
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//
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// Locate protocol.
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//
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Status = gBS->LocateHandleBuffer (
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ByProtocol,
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Protocol,
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NULL,
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&NumberOfHandles,
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&HandleBuffer
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);
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if (EFI_ERROR (Status)) {
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//
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// Defined errors at this time are not found and out of resources.
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//
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return Status;
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}
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//
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// Looking for FV with ACPI storage file
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//
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for (Index = 0; Index < NumberOfHandles; Index++) {
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//
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// Get the protocol on this handle
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// This should not fail because of LocateHandleBuffer
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//
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Status = gBS->HandleProtocol (
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HandleBuffer[Index],
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Protocol,
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Instance
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);
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ASSERT (!EFI_ERROR (Status));
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if (!Type) {
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//
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// Not looking for the FV protocol, so find the first instance of the
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// protocol. There should not be any errors because our handle buffer
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// should always contain at least one or LocateHandleBuffer would have
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// returned not found.
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//
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break;
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}
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//
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// See if it has the ACPI storage file
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//
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Status = ((EFI_FIRMWARE_VOLUME2_PROTOCOL *) (*Instance))->ReadFile (
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*Instance,
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gEfiAcpiMultiTableStorageGuid,
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NULL,
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&Size,
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&FileType,
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&Attributes,
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&FvStatus
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);
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//
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// If we found it, then we are done
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//
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if (!EFI_ERROR (Status)) {
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break;
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}
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}
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//
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// Our exit status is determined by the success of the previous operations
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// If the protocol was found, Instance already points to it.
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//
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//
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// Free any allocated buffers
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//
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gBS->FreePool (HandleBuffer);
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return Status;
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}
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/**
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GC_TODO: add routine description
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@param None
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@retval EFI_SUCCESS - GC_TODO: add retval description
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**/
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EFI_STATUS
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PlatformHookInit (
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VOID
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)
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{
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EFI_STATUS Status;
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EFI_PHYSICAL_ADDRESS AcpiParameterAddr;
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UINT32 RegEax;
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UINT32 RegEbx;
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UINT32 RegEcx;
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UINT32 RegEdx;
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CopyMem (&mSocketMpLinkConfiguration, PcdGetPtr(PcdSocketMpLinkConfigData), sizeof(SOCKET_MP_LINK_CONFIGURATION));
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CopyMem (&mSocketPowermanagementConfiguration, PcdGetPtr(PcdSocketPowerManagementConfigData), sizeof(SOCKET_POWERMANAGEMENT_CONFIGURATION));
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CopyMem (&mSocketIioConfiguration, PcdGetPtr(PcdSocketIioConfigData), sizeof(SOCKET_IIO_CONFIGURATION));
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CopyMem (&mPchRcConfiguration, PcdGetPtr(PcdPchRcConfigurationData), sizeof(PCH_RC_CONFIGURATION));
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DEBUG ((DEBUG_INFO, "mX2ApicEnabled - 0x%x\n", mX2ApicEnabled));
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DEBUG ((DEBUG_INFO, "mForceX2ApicId - 0x%x\n", mForceX2ApicId));
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{
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UINT32 Index;
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for (Index = 0; Index < 4; Index++) {
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AsmCpuidEx(CPUID_EXTENDED_TOPOLOGY, Index, &RegEax, &RegEbx, &RegEcx, &RegEdx);
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DEBUG ((DEBUG_INFO, "CPUID(0xB - %d) - 0x%08x.0x%08x.0x%08x.0x%08x\n", Index, RegEax, RegEbx, RegEcx, RegEdx));
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}
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}
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//
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// Allocate 256 runtime memory to pass ACPI parameter
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// This Address must be < 4G because we only have 32bit in the dsdt
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//
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AcpiParameterAddr = 0xffffffff;
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Status = gBS->AllocatePages (
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AllocateMaxAddress,
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EfiACPIMemoryNVS,
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EFI_SIZE_TO_PAGES (sizeof(BIOS_ACPI_PARAM)),
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&AcpiParameterAddr
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);
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ASSERT_EFI_ERROR (Status);
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mAcpiParameter = (BIOS_ACPI_PARAM *)AcpiParameterAddr;
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DEBUG ((EFI_D_ERROR, "ACPI Parameter Block Address: 0x%X\n", mAcpiParameter));
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Status = PcdSet64S (PcdAcpiGnvsAddress, (UINT64)(UINTN)mAcpiParameter);
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ASSERT_EFI_ERROR (Status);
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ZeroMem (mAcpiParameter, sizeof (BIOS_ACPI_PARAM));
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mAcpiParameter->PlatformId = 0;
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#if MAX_SOCKET > 4
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mAcpiParameter->IoApicEnable = PcdGet32 (PcdPcIoApicEnable);
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#else
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mAcpiParameter->IoApicEnable = (PcdGet32 (PcdPcIoApicEnable) << 1) | 1;
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#endif
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DEBUG((EFI_D_ERROR, "io apic settings:%d\n", mAcpiParameter->IoApicEnable));
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AsmCpuid (CPUID_VERSION_INFO, &RegEax, &RegEbx, &RegEcx, &RegEdx);
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mAcpiParameter->ProcessorId = (RegEax & 0xFFFF0);
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// support up to 64 threads/socket
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AsmCpuidEx(CPUID_EXTENDED_TOPOLOGY, 1, &mNumOfBitShift, NULL, NULL, NULL);
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mNumOfBitShift &= 0x1F;
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// Set the bit shift value for CPU SKU
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mAcpiParameter->CpuSkuNumOfBitShift = (UINT8) mNumOfBitShift;
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mAcpiParameter->ProcessorApicIdBase[0] = (UINT32) (0 << mNumOfBitShift);
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mAcpiParameter->ProcessorApicIdBase[1] = (UINT32) (1 << mNumOfBitShift);
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mAcpiParameter->ProcessorApicIdBase[2] = (UINT32) (2 << mNumOfBitShift);
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mAcpiParameter->ProcessorApicIdBase[3] = (UINT32) (3 << mNumOfBitShift);
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mAcpiParameter->ProcessorApicIdBase[4] = (UINT32) (4 << mNumOfBitShift);
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mAcpiParameter->ProcessorApicIdBase[5] = (UINT32) (5 << mNumOfBitShift);
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mAcpiParameter->ProcessorApicIdBase[6] = (UINT32) (6 << mNumOfBitShift);
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mAcpiParameter->ProcessorApicIdBase[7] = (UINT32) (7 << mNumOfBitShift);
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if(mForceX2ApicId) {
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mAcpiParameter->ProcessorApicIdBase[0] = 0x7F00;
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mAcpiParameter->ProcessorApicIdBase[1] = 0x7F20;
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mAcpiParameter->ProcessorApicIdBase[2] = 0x7F40;
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mAcpiParameter->ProcessorApicIdBase[3] = 0x7F60;
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mAcpiParameter->ProcessorApicIdBase[4] = 0x7F80;
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mAcpiParameter->ProcessorApicIdBase[5] = 0x7Fa0;
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mAcpiParameter->ProcessorApicIdBase[6] = 0x7Fc0;
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mAcpiParameter->ProcessorApicIdBase[7] = 0x7Fe0;
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if (mNumOfBitShift == 4) {
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mAcpiParameter->ProcessorApicIdBase[0] = 0x7F00;
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mAcpiParameter->ProcessorApicIdBase[1] = 0x7F10;
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mAcpiParameter->ProcessorApicIdBase[2] = 0x7F20;
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mAcpiParameter->ProcessorApicIdBase[3] = 0x7F30;
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mAcpiParameter->ProcessorApicIdBase[4] = 0x7F40;
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mAcpiParameter->ProcessorApicIdBase[5] = 0x7F50;
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mAcpiParameter->ProcessorApicIdBase[6] = 0x7F60;
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mAcpiParameter->ProcessorApicIdBase[7] = 0x7F70;
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} else if(mNumOfBitShift == 6) {
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mAcpiParameter->ProcessorApicIdBase[0] = 0x7E00;
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mAcpiParameter->ProcessorApicIdBase[1] = 0x7E20;
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mAcpiParameter->ProcessorApicIdBase[2] = 0x7E40;
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mAcpiParameter->ProcessorApicIdBase[3] = 0x7E60;
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mAcpiParameter->ProcessorApicIdBase[4] = 0x7E80;
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mAcpiParameter->ProcessorApicIdBase[5] = 0x7Ea0;
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mAcpiParameter->ProcessorApicIdBase[6] = 0x7Ec0;
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mAcpiParameter->ProcessorApicIdBase[7] = 0x7Ee0;
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}
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}
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//
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// If SNC is enabled, and NumOfCluster is 2, set the ACPI variable for PXM value
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//
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if(mIioUds->IioUdsPtr->SystemStatus.OutSncEn && (mIioUds->IioUdsPtr->SystemStatus.OutNumOfCluster == 2)){
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mAcpiParameter->SncAnd2Cluster = 1;
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} else {
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mAcpiParameter->SncAnd2Cluster = 0;
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}
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mAcpiParameter->MmCfg = (UINT32)mIioUds->IioUdsPtr->PlatformData.PciExpressBase;
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mAcpiParameter->TsegSize = (UINT32)(mIioUds->IioUdsPtr->PlatformData.MemTsegSize >> 20);
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return EFI_SUCCESS;
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}
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/**
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This function will update any runtime platform specific information.
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This currently includes:
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Setting OEM table values, ID, table ID, creator ID and creator revision.
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Enabling the proper processor entries in the APIC tables.
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@param Table - The table to update
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@retval EFI_SUCCESS - The function completed successfully.
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**/
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EFI_STATUS
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PlatformUpdateTables (
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IN OUT EFI_ACPI_COMMON_HEADER *Table,
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IN OUT EFI_ACPI_TABLE_VERSION *Version
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)
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{
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EFI_STATUS Status;
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Status = EFI_SUCCESS;
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//
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// By default, a table belongs in all ACPI table versions published.
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// Some tables will override this because they have different versions of the table.
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//
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*Version = EFI_ACPI_TABLE_VERSION_2_0;
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//
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// Update the processors in the APIC table
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//
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switch (Table->Signature) {
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case EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE:
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//
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// Patch the memory resource
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//
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Status = PatchDsdtTable(Table);
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break;
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default:
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ASSERT(FALSE);
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break;
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}
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//
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//
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// Update the hardware signature in the FACS structure
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//
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//
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//
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return Status;
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}
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/**
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GC_TODO: Add function description
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@param Event - GC_TODO: add argument description
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@param Context - GC_TODO: add argument description
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@retval GC_TODO: add return values
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**/
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STATIC
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VOID
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EFIAPI
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OnReadyToBoot (
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IN EFI_EVENT Event,
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IN VOID *Context
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)
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{
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UINT32 RegEax;
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UINT32 RegEbx;
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UINT32 RegEcx;
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UINT32 RegEdx;
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if (mFirstNotify) {
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return ;
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}
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mFirstNotify = TRUE;
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CopyMem (&mSocketIioConfiguration, PcdGetPtr(PcdSocketIioConfigData), sizeof(SOCKET_IIO_CONFIGURATION));
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CopyMem (&mSocketPowermanagementConfiguration,PcdGetPtr(PcdSocketPowerManagementConfigData), sizeof(SOCKET_POWERMANAGEMENT_CONFIGURATION));
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CopyMem (&mPchRcConfiguration, PcdGetPtr(PcdPchRcConfigurationData), sizeof(PCH_RC_CONFIGURATION));
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// CpuPm.Asl: External (CSEN, FieldUnitObj)
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mAcpiParameter->CStateEnable = !mSocketPowermanagementConfiguration.ProcessorAutonomousCstateEnable;
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// CpuPm.Asl: External (C3EN, FieldUnitObj)
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mAcpiParameter->C3Enable = mSocketPowermanagementConfiguration.C3Enable;
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// CpuPm.Asl: External (C6EN, FieldUnitObj)
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if (mSocketPowermanagementConfiguration.C6Enable == PPM_AUTO) {
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mAcpiParameter->C6Enable = 1; //POR Default = Enabled
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} else {
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mAcpiParameter->C6Enable = mSocketPowermanagementConfiguration.C6Enable;
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}
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if(mAcpiParameter->C6Enable && mAcpiParameter->C3Enable) { //C3 and C6 enable are exclusive
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mAcpiParameter->C6Enable = 1;
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mAcpiParameter->C3Enable = 0;
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}
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// CpuPm.Asl: External (C7EN, FieldUnitObj)
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mAcpiParameter->C7Enable = 0;
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// CpuPm.Asl: External (OSCX, FieldUnitObj)
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mAcpiParameter->OSCX = mSocketPowermanagementConfiguration.OSCx;
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// CpuPm.Asl: External (MWOS, FieldUnitObj)
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mAcpiParameter->MonitorMwaitEnable = 1;
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// CpuPm.Asl: External (PSEN, FieldUnitObj)
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mAcpiParameter->PStateEnable = mSocketPowermanagementConfiguration.ProcessorEistEnable;
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// CpuPm.Asl: External (HWAL, FieldUnitObj)
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mAcpiParameter->HWAllEnable = 0; //Update in PatchGv3SsdtTable
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mAcpiParameter->KBPresent = mKBPresent;
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mAcpiParameter->MousePresent = mMousePresent;
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mAcpiParameter->TStateEnable = mSocketPowermanagementConfiguration.TStateEnable;
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//Fine grained T state
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AsmCpuid (CPUID_THERMAL_POWER_MANAGEMENT, &RegEax, &RegEbx, &RegEcx, &RegEdx);
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if ((RegEax & EFI_FINE_GRAINED_CLOCK_MODULATION) && (mSocketPowermanagementConfiguration.OnDieThermalThrottling > 0)){
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mAcpiParameter->TStateFineGrained = 1;
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}
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if(RegEax & B_CPUID_POWER_MANAGEMENT_EAX_HWP_LVT_INTERRUPT_SUPPORT) {
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mAcpiParameter->HwpInterrupt = 1;
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}
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// CpuPm.Asl: External (HWEN, FieldUnitObj)
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mAcpiParameter->HWPMEnable = mSocketPowermanagementConfiguration.ProcessorHWPMEnable;
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// CpuPm.Asl: External (ACEN, FieldUnitObj)
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mAcpiParameter->AutoCstate = mSocketPowermanagementConfiguration.ProcessorAutonomousCstateEnable;
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mAcpiParameter->EmcaEn = 0;
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mAcpiParameter->PcieAcpiHotPlugEnable = (UINT8) (BOOLEAN) (mSocketIioConfiguration.PcieAcpiHotPlugEnable != 0);
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//
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// Initialize USB3 mode from setup data
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//
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// If mode != manual control
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// just copy mode from setup
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if (mPchRcConfiguration.PchUsbManualMode != 1) {
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mAcpiParameter->XhciMode = mPchRcConfiguration.PchUsbManualMode;
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}
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}
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/**
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Entry point for Acpi platform driver.
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@param ImageHandle - A handle for the image that is initializing this driver.
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@param SystemTable - A pointer to the EFI system table.
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@retval EFI_SUCCESS - Driver initialized successfully.
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@retval EFI_LOAD_ERROR - Failed to Initialize or has been loaded.
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@retval EFI_OUT_OF_RESOURCES - Could not allocate needed resources.
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**/
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EFI_STATUS
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EFIAPI
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InstallAcpiBoard (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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EFI_STATUS AcpiStatus;
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EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
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EFI_FIRMWARE_VOLUME2_PROTOCOL *FwVol;
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INTN Instance;
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EFI_ACPI_COMMON_HEADER *CurrentTable;
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UINTN TableHandle;
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UINT32 FvStatus;
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UINT32 Size;
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EFI_EVENT Event;
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EFI_ACPI_TABLE_VERSION TableVersion;
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EFI_HOB_GUID_TYPE *GuidHob;
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mFirstNotify = FALSE;
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TableVersion = EFI_ACPI_TABLE_VERSION_NONE;
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Instance = 0;
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CurrentTable = NULL;
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TableHandle = 0;
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//
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// Locate the IIO Protocol Interface
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//
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Status = gBS->LocateProtocol (&gEfiIioUdsProtocolGuid,NULL,&mIioUds);
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ASSERT_EFI_ERROR (Status);
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GuidHob = GetFirstGuidHob (&gEfiMemoryMapGuid);
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ASSERT (GuidHob != NULL);
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if (GuidHob == NULL) {
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return EFI_NOT_FOUND;
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}
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mSystemMemoryMap = GET_GUID_HOB_DATA(GuidHob);
|
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PlatformHookInit ();
|
|
//
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// Find the AcpiTable protocol
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//
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Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, &AcpiTable);
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ASSERT_EFI_ERROR (Status);
|
|
//
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// Locate the firmware volume protocol
|
//
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Status = LocateSupportProtocol (
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&gEfiFirmwareVolume2ProtocolGuid,
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&gEfiCallerIdGuid,
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&FwVol,
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TRUE
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);
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ASSERT_EFI_ERROR (Status);
|
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Status = EFI_SUCCESS;
|
Instance = 0;
|
|
//
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// Read tables from the storage file.
|
//
|
while (!EFI_ERROR (Status)) {
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CurrentTable = NULL;
|
|
Status = FwVol->ReadSection (
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FwVol,
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&gEfiCallerIdGuid,
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EFI_SECTION_RAW,
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Instance,
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&CurrentTable,
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(UINTN *) &Size,
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&FvStatus
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);
|
|
if (!EFI_ERROR (Status)) {
|
//
|
// Allow platform specific code to reject the table or update it
|
//
|
{
|
//
|
// Perform any table specific updates.
|
//
|
AcpiStatus = PlatformUpdateTables (CurrentTable, &TableVersion);
|
if (!EFI_ERROR (AcpiStatus)) {
|
//
|
// Add the table
|
//
|
TableHandle = 0;
|
if (TableVersion != EFI_ACPI_TABLE_VERSION_NONE) {
|
AcpiStatus = AcpiTable->InstallAcpiTable (
|
AcpiTable,
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CurrentTable,
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CurrentTable->Length,
|
&TableHandle
|
);
|
}
|
ASSERT_EFI_ERROR (AcpiStatus);
|
}
|
}
|
//
|
// Increment the instance
|
//
|
Instance++;
|
}
|
}
|
|
Status = EfiCreateEventReadyToBootEx(
|
TPL_NOTIFY,
|
OnReadyToBoot,
|
NULL,
|
&Event
|
);
|
|
//
|
// Finished
|
//
|
return EFI_SUCCESS;
|
}
|
