/** @file
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Platform Hook Library instances
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Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Base.h>
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#include <Uefi/UefiBaseType.h>
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#include <Library/PlatformHookLib.h>
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#include <Library/BaseLib.h>
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#include <Library/IoLib.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/PcdLib.h>
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#include <SystemAgent/Include/SaAccess.h>
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#include <SioRegs.h>
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#include <Library/PchCycleDecodingLib.h>
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#include <Register/PchRegsLpc.h>
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#include <PchAccess.h>
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#define LPC_SIO_INDEX_DEFAULT_PORT_2 0x2E
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#define LPC_SIO_DATA_DEFAULT_PORT_2 0x2F
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#define IT8628_ENTER_CONFIG_WRITE_SEQ_0 0x87
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#define IT8628_ENTER_CONFIG_WRITE_SEQ_1 0x01
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#define IT8628_ENTER_CONFIG_WRITE_SEQ_2 0x55
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#define IT8628_ENTER_CONFIG_WRITE_SEQ_3 0x55
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#define IT8628_EXIT_CONFIG 0x2
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#define IT8628_CHIPID_BYTE1 0x86
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#define IT8628_CHIPID_BYTE2 0x28
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typedef struct {
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UINT8 Register;
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UINT8 Value;
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} EFI_SIO_TABLE;
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//
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// IT8628
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//
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GLOBAL_REMOVE_IF_UNREFERENCED EFI_SIO_TABLE mSioIt8628TableSerialPort[] = {
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{0x023, 0x09}, // Clock Selection register
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{0x007, 0x01}, // Com1 Logical Device Number select
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{0x061, 0xF8}, // Serial Port 1 Base Address MSB Register
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{0x060, 0x03}, // Serial Port 1 Base Address LSB Register
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{0x070, 0x04}, // Serial Port 1 Interrupt Level Select
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{0x030, 0x01}, // Serial Port 1 Activate
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{0x007, 0x02}, // Com1 Logical Device Number select
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{0x061, 0xF8}, // Serial Port 2 Base Address MSB Register
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{0x060, 0x02}, // Serial Port 2 Base Address MSB Register
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{0x070, 0x03}, // Serial Port 2 Interrupt Level Select
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{0x030, 0x01} // Serial Port 2 Activate
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};
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/**
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Check whether the IT8628 SIO present on LPC. If yes, enable its serial ports
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**/
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STATIC
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VOID
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It8628SioSerialPortInit (
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VOID
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)
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{
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UINT8 ChipId0;
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UINT8 ChipId1;
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UINT16 LpcIoDecondeRangeSet;
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UINT16 LpcIoDecoodeSet;
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UINT8 Index;
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UINT64 LpcBaseAddr;
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ChipId0 = 0;
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ChipId1 = 0;
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LpcIoDecondeRangeSet = 0;
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LpcIoDecoodeSet = 0;
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//
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// Enable I/O decoding for COM1 (3F8h-3FFh), COM2(2F8h-2FFh), I/O port 2Eh/2Fh.
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//
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LpcBaseAddr = PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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PCI_DEVICE_NUMBER_PCH_LPC,
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PCI_FUNCTION_NUMBER_PCH_LPC,
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0
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);
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LpcIoDecondeRangeSet = (UINT16) PciSegmentRead16 (LpcBaseAddr + R_LPC_CFG_IOD);
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LpcIoDecoodeSet = (UINT16) PciSegmentRead16 (LpcBaseAddr + R_LPC_CFG_IOE);
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PciSegmentWrite16 ((LpcBaseAddr + R_LPC_CFG_IOD), (LpcIoDecondeRangeSet | ((V_LPC_CFG_IOD_COMB_2F8 << 4) | V_LPC_CFG_IOD_COMA_3F8)));
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PciSegmentWrite16 ((LpcBaseAddr + R_LPC_CFG_IOE), (LpcIoDecoodeSet | (B_LPC_CFG_IOE_SE | B_LPC_CFG_IOE_CBE | B_LPC_CFG_IOE_CAE|B_LPC_CFG_IOE_KE)));
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//
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// Enter MB PnP Mode
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//
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IoWrite8 (LPC_SIO_INDEX_DEFAULT_PORT_2, IT8628_ENTER_CONFIG_WRITE_SEQ_0);
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IoWrite8 (LPC_SIO_INDEX_DEFAULT_PORT_2, IT8628_ENTER_CONFIG_WRITE_SEQ_1);
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IoWrite8 (LPC_SIO_INDEX_DEFAULT_PORT_2, IT8628_ENTER_CONFIG_WRITE_SEQ_2);
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IoWrite8 (LPC_SIO_INDEX_DEFAULT_PORT_2, IT8628_ENTER_CONFIG_WRITE_SEQ_3);
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//
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// Read Chip Id of SIO IT8628 (registers 0x20 and 0x21)
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//
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IoWrite8 (LPC_SIO_INDEX_DEFAULT_PORT_2, 0x20);
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ChipId0 = IoRead8 (LPC_SIO_DATA_DEFAULT_PORT_2);
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IoWrite8 (LPC_SIO_INDEX_DEFAULT_PORT_2, 0x21);
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ChipId1 = IoRead8 (LPC_SIO_DATA_DEFAULT_PORT_2);
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//
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// Enable Serial Port 1, Port 2
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//
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if ((ChipId0 == IT8628_CHIPID_BYTE1) && (ChipId1 == IT8628_CHIPID_BYTE2)) {
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for (Index = 0; Index < sizeof (mSioIt8628TableSerialPort) / sizeof (EFI_SIO_TABLE); Index++) {
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IoWrite8 (LPC_SIO_INDEX_DEFAULT_PORT_2, mSioIt8628TableSerialPort[Index].Register);
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IoWrite8 (LPC_SIO_DATA_DEFAULT_PORT_2, mSioIt8628TableSerialPort[Index].Value);
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}
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}
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//
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// Exit MB PnP Mode
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//
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IoWrite8 (LPC_SIO_INDEX_DEFAULT_PORT_2, IT8628_EXIT_CONFIG);
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IoWrite8 (LPC_SIO_DATA_DEFAULT_PORT_2, IT8628_EXIT_CONFIG);
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return;
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}
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/**
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Performs platform specific initialization required for the CPU to access
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the hardware associated with a SerialPortLib instance. This function does
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not initialize the serial port hardware itself. Instead, it initializes
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hardware devices that are required for the CPU to access the serial port
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hardware. This function may be called more than once.
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@retval RETURN_SUCCESS The platform specific initialization succeeded.
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@retval RETURN_DEVICE_ERROR The platform specific initialization could not be completed.
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**/
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RETURN_STATUS
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EFIAPI
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PlatformHookSerialPortInitialize (
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VOID
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)
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{
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//
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// Enable I/O decoding for COM1(3F8h-3FFh), COM2(2F8h-2FFh), I/O port 2Eh/2Fh, 4Eh/4Fh, 60h/64Fh and 62h/66h.
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//
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PchLpcIoDecodeRangesSet (PcdGet16 (PcdLpcIoDecodeRange));
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PchLpcIoEnableDecodingSet (PcdGet16 (PchLpcIoEnableDecoding));
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// Configure Sio IT8628
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It8628SioSerialPortInit ();
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return RETURN_SUCCESS;
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}
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