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| Ð þí ô H T ( FVP Foundation arm,fvp-base arm,vexpress " 1 chosen =serial0 aliases / I/smb/motherboard/iofpga@3,00000000/uart@090000 / Q/smb/motherboard/iofpga@3,00000000/uart@0a0000 / Y/smb/motherboard/iofpga@3,00000000/uart@0b0000 / a/smb/motherboard/iofpga@3,00000000/uart@0c0000 psci # arm,psci-1.0 arm,psci-0.2 arm,psci ismc pÄ | Ä cpus " 1 cpu-map cluster0 core0 core1 core2 core3 idle-states arm,psci cpu-sleep-0 arm,idle-state Ä ( Õ d å ö ü cluster-sleep-0 arm,idle-state Ä ô Õ è å Ä ö ü cpu@0 cpu
| arm,armv8 psci " ö ü cpu@1 cpu
| arm,armv8 psci " ö ü cpu@2 cpu
| arm,armv8 psci " ö ü cpu@3 cpu
| arm,armv8 psci " ö ü memory@80000000 memory interrupt-controller@2f000000 arm,gic-v3 2 " 1 C J P / / , , ,ð _ ö ü its@2f020000 arm,gic-v3-its j / timer arm,armv8-timer 0 _ ÿ ÿ ÿ
| ÿ yõá timer@2a810000 arm,armv7-timer-mem * yõá " 1 C frame@2a830000 _ * pmu arm,armv8-pmuv3 0 _ < = > ? smb simple-bus " 1 x C 2 ? ©
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| ! ! " " # # $ $ % % & & ' ' ( ( ) ) * * motherboard ·rs1 arm,vexpress,v2m-p1 simple-bus " 1 2 C ethernet@2,02000000 smsc,lan91c111 _ clk24mhz fixed-clock Ê yn6 ×v2m:clk24mhz ö
| ü
| refclk1mhz fixed-clock Ê y B@ ×v2m:refclk1mhz ö ü refclk32khz fixed-clock Ê y ×v2m:refclk32khz ö ü iofpga@3,00000000 arm,amba-bus simple-bus " 1 C sysreg@010000 arm,vexpress-sysreg ê ú ö ü sysctl@020000 arm,sp810 arm,primecell
| refclk timclk apb_pclk Ê 0 ×timerclken0 timerclken1 timerclken2 timerclken3 ö ü uart@090000 arm,pl011 arm,primecell _
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| uartclk apb_pclk uart@0a0000 arm,pl011 arm,primecell
| _
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| uartclk apb_pclk uart@0b0000 arm,pl011 arm,primecell _
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| uartclk apb_pclk uart@0c0000 arm,pl011 arm,primecell _
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| uartclk apb_pclk wdt@0f0000 arm,sp805 arm,primecell _
| wdogclk apb_pclk timer@110000 arm,sp804 arm,primecell _
| timclken1 timclken2 apb_pclk timer@120000 arm,sp804 arm,primecell _
| timclken1 timclken2 apb_pclk rtc@170000 arm,pl031 arm,primecell _
| apb_pclk virtio_block@0130000 virtio,mmio _ * fixedregulator@0 regulator-fixed 3V3 ( 2Z @ 2Z X mcc # arm,vexpress,config-bus simple-bus l reset@0 arm,vexpress-reset muxfpga@0 arm,vexpress-muxfpga shutdown@0 arm,vexpress-shutdown reboot@0 arm,vexpress-reboot dvimode@0 arm,vexpress-dvimode model compatible interrupt-parent #address-cells #size-cells stdout-path serial0 serial1 serial2 serial3 method cpu_suspend cpu_off cpu_on cpu entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us linux,phandle device_type reg enable-method cpu-idle-states #interrupt-cells ranges interrupt-controller interrupts msi-controller clock-frequency frame-number interrupt-map-mask interrupt-map arm,v2m-memory-map #clock-cells clock-output-names gpio-controller #gpio-cells clocks clock-names regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on arm,vexpress,config-bridge arm,vexpress-sysreg,func
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