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| Ð þí H Ø ( ¨ FVP Foundation arm,fvp-base arm,vexpress " 1 chosen =serial0 aliases / I/smb/motherboard/iofpga@3,00000000/uart@090000 / Q/smb/motherboard/iofpga@3,00000000/uart@0a0000 / Y/smb/motherboard/iofpga@3,00000000/uart@0b0000 / a/smb/motherboard/iofpga@3,00000000/uart@0c0000 psci # arm,psci-1.0 arm,psci-0.2 arm,psci ismc pÄ | Ä cpus " 1 cpu-map cluster0 core0 ¢ core1 ¢ core2 ¢ core3 ¢ idle-states ¦arm,psci cpu-sleep-0 arm,idle-state ³ Ä Û ( ì d ü cluster-sleep-0 arm,idle-state ³ Ä Û ô ì è ü Ä cpu@0 cpu
| arm,armv8 ' +psci 9 cpu@1 cpu
| arm,armv8 ' +psci 9 cpu@2 cpu
| arm,armv8 ' +psci 9 cpu@3 cpu
| arm,armv8 ' +psci 9 memory@80000000 memory ' interrupt-controller@2f000000 % arm,cortex-a15-gic arm,cortex-a9-gic I " Z @ ' / , , ,ð o timer arm,armv8-timer 0 o ÿ ÿ ÿ
| ÿ zõá timer@2a810000 arm,armv7-timer-mem ' * zõá " 1 frame@2a830000 o ' * pmu arm,armv8-pmuv3 0 o < = > ? smb simple-bus " 1 x I ? ´ ±
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| ! ! " " # # $ $ % % & & ' ' ( ( ) ) * * motherboard ¿rs1 arm,vexpress,v2m-p1 simple-bus " 1 I ethernet@2,02000000 smsc,lan91c111 ' o clk24mhz fixed-clock Ò zn6 ßv2m:clk24mhz
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| refclk1mhz fixed-clock Ò z B@ ßv2m:refclk1mhz refclk32khz fixed-clock Ò z ßv2m:refclk32khz iofpga@3,00000000 arm,amba-bus simple-bus " 1 sysreg@010000 arm,vexpress-sysreg ' ò sysctl@020000 arm,sp810 arm,primecell '
| refclk timclk apb_pclk Ò 0 ßtimerclken0 timerclken1 timerclken2 timerclken3 uart@090000 arm,pl011 arm,primecell ' o
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| uartclk apb_pclk uart@0a0000 arm,pl011 arm,primecell '
| o
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| uartclk apb_pclk uart@0b0000 arm,pl011 arm,primecell ' o
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| uartclk apb_pclk uart@0c0000 arm,pl011 arm,primecell ' o
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| uartclk apb_pclk wdt@0f0000 arm,sp805 arm,primecell ' o
| wdogclk apb_pclk timer@110000 arm,sp804 arm,primecell ' o
| timclken1 timclken2 apb_pclk timer@120000 arm,sp804 arm,primecell ' o
| timclken1 timclken2 apb_pclk rtc@170000 arm,pl031 arm,primecell ' o
| apb_pclk virtio_block@0130000 virtio,mmio ' o * fixedregulator@0 regulator-fixed !3V3 0 2Z H 2Z ` mcc # arm,vexpress,config-bus simple-bus t muxfpga@0 arm,vexpress-muxfpga dvimode@0 arm,vexpress-dvimode model compatible interrupt-parent #address-cells #size-cells stdout-path serial0 serial1 serial2 serial3 method cpu_suspend cpu_off cpu_on sys_poweroff sys_reset cpu entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us linux,phandle device_type reg enable-method cpu-idle-states #interrupt-cells interrupt-controller interrupts clock-frequency ranges frame-number interrupt-map-mask interrupt-map arm,v2m-memory-map #clock-cells clock-output-names gpio-controller #gpio-cells clocks clock-names regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on arm,vexpress,config-bridge arm,vexpress-sysreg,func
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