/** @file
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Secondary System Description Table (SSDT) for hardware reduced events.
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Arm Reference Design platforms implement the HW-Reduced ACPI model and do not
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support legacy ACPI Fixed Hardware interfaces.
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GPIO Signalled ACPI event is one of the methods for signalling events in
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HW-Reduced ACPI model. In this method, ACPI events can be signaled when a GPIO
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Interrupt is received by OSPM and that GPIO Interrupt Connection is listed in
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a GPIO controller device’s _AEI object.
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Interrupt Signalled ACPI event is another method of signalling events in
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HW-Reduced ACPI model. In this method, ACPI event is generated when an
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interrupt is received by the OSPM which is listed in the Generic Event Device
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(GED) _CRS object.
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Copyright (c) 2021, ARM Limited. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Specification Reference:
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- ACPI 6.4, Chapter 5.6.5, GPIO-signaled ACPI Events
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- Arm Base Boot Requirements 1.0, Issue F, Chapter 8.5.3, GPIO controllers
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- ACPI 6.4, Chapter 5.6.9, Interrupt-signaled ACPI events
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- Arm Base Boot Requirements 1.0, Issue F, Chapter 8.5.4 Generic Event
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Devices
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**/
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#include "SgiAcpiHeader.h"
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DefinitionBlock("SsdtEvent.aml", "SSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI_ARM_OEM_REVISION) {
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/* GPIO Controller 0 device. Use _AEI object to configure pin 0 for
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signalling HW-Reduced events and the _L00 method to handle the event
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generated by pin 0.
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*/
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Device (\_SB.GPI0)
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{
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Name (_HID, "ARMH0061") /* PrimeCell GPIO */
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Name (_UID, 0)
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/* Resource setting for GPIO controller 0 */
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Name (_CRS, ResourceTemplate () {
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Memory32Fixed (
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ReadWrite,
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FixedPcdGet32 (PcdGpioController0BaseAddress),
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FixedPcdGet32 (PcdGpioController0Size)
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)
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Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
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FixedPcdGet32 (PcdGpioController0Interrupt)
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}
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})
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/* ACPI Event information for GPIO controller 0 */
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Name (_AEI, ResourceTemplate() {
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GpioInt (Level, ActiveHigh, Exclusive, PullDown, , "\\_SB.GPI0") {0}
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})
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/* Event handler for pin0 */
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Method (_L00) {
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Printf ("GPIO0 Pin0 Toggled")
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Store (1, INC0)
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}
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/* Mapping for interrupt clear register */
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OperationRegion (
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GIO0,
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SystemMemory,
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FixedPcdGet32 (PcdGpioController0BaseAddress),
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FixedPcdGet32 (PcdGpioController0Size)
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)
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Field (GIO0, ByteAcc, NoLock, Preserve) {
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Offset (0x41C), /* WO Intr clear on writing 1 to resp bit */
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INC0, 8
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}
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}
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/* ACPI GED object Template. Arm's reference design platforms include a SP804
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dual timer which is implemented as part of the RoS sub-system. The SP804
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interrupt is used in GED as interrupt source. */
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Device (\_SB.GED0) {
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Name (_HID, "ACPI0013")
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Name (_UID, 0)
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/* Resource setting for GED */
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Name (_CRS, ResourceTemplate () {
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Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
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FixedPcdGet32 (PcdSp804DualTimerInterrupt)
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}
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})
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Method (_STA, 0x0, NotSerialized) {
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return (0xF);
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}
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/* Register map for interrupt clear register */
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OperationRegion (
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DTIM,
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SystemMemory,
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FixedPcdGet32 (PcdSp804DualTimerBaseAddress),
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FixedPcdGet32 (PcdSp804DualTimerSize))
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Field (DTIM, DWordAcc, NoLock, Preserve) {
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Offset (0x0C),
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T1IC, 32, /* 0x0C Timer 1 Interrupt clear */
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}
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/* GED event handler */
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Method (_EVT, 1, Serialized) {
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switch (ToInteger (Arg0))
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{
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case (FixedPcdGet32 (PcdSp804DualTimerInterrupt)) {
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Store (0x01, T1IC)
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}
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}
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}
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} /* Device (\_SB.GED0) */
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}
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