/** @file
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* Heterogeneous Memory Attribute Table (HMAT)
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*
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* Copyright (c) 2020-2021, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <IndustryStandard/Acpi.h>
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#include <Library/AcpiLib.h>
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#include <Library/ArmLib.h>
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#include <SgiAcpiHeader.h>
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#include <SgiPlatform.h>
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#define CHIP_CNT FixedPcdGet32 (PcdChipCount)
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#define INITATOR_PROXIMITY_DOMAIN_CNT 2
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#define TARGET_PROXIMITY_DOMAIN_CNT 2
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//
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// HMAT Table
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//
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#pragma pack (1)
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typedef struct InitiatorTargetProximityMatrix {
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UINT32 InitatorProximityDomain[INITATOR_PROXIMITY_DOMAIN_CNT];
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UINT32 TargetProximityDomain[TARGET_PROXIMITY_DOMAIN_CNT];
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UINT16 MatrixEntry[INITATOR_PROXIMITY_DOMAIN_CNT * TARGET_PROXIMITY_DOMAIN_CNT];
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} INITIATOR_TARGET_PROXIMITY_MATRIX;
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typedef struct {
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EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER Header;
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EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES Proximity[CHIP_CNT];
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EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO LatencyInfo;
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INITIATOR_TARGET_PROXIMITY_MATRIX Matrix;
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EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache0;
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EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache1;
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} EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE;
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#pragma pack ()
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EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE Hmat = {
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// Header
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{
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ARM_ACPI_HEADER (
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EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE,
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EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE,
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EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION
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),
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{
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EFI_ACPI_RESERVED_BYTE,
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EFI_ACPI_RESERVED_BYTE,
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EFI_ACPI_RESERVED_BYTE,
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EFI_ACPI_RESERVED_BYTE
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},
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},
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// Memory Proximity Domain
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{
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EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
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1, 0x0, 0x0),
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EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
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1, 0x1, 0x1),
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},
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// Latency Info
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EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_INIT (
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0, 0, INITATOR_PROXIMITY_DOMAIN_CNT, TARGET_PROXIMITY_DOMAIN_CNT, 100),
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{
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{0, 1},
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{0, 1},
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{
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//
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// The latencies mentioned in this table are hypothetical values and
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// represents typical latency between two chips. These values are
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// applicable only for RD-N1-Edge dual-chip fixed virtual platform and
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// should not be reused for other platforms.
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//
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10, 20,
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20, 10,
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}
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},
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// Memory Side Cache
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EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
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0x0,
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SIZE_8MB,
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HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
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1,
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1,
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2,
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2,
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64 // 64 bytes cache line length
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),
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0),
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EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
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0x1,
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SIZE_8MB,
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HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
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1,
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1,
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2,
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2,
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64 // 64 bytes cache line length
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),
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0),
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};
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//
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// Reference the table being generated to prevent the optimizer from removing
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// the data structure from the executable
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//
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VOID* CONST ReferenceAcpiTable = &Hmat;
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