/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#include "halrf_precomp.h"
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void halrf_cmn_info_self_init(struct rf_info *rf)
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{
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struct rtw_hal_com_t *hal_i = rf->hal_com;
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if (hal_i->chip_id == CHIP_WIFI6_8852A)
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rf->ic_type = RF_RTL8852A;
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else if (hal_i->chip_id == CHIP_WIFI6_8834A)
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rf->ic_type = RF_RTL8834A;
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else if (hal_i->chip_id == CHIP_WIFI6_8852B)
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rf->ic_type = RF_RTL8852B;
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else if (hal_i->chip_id == CHIP_WIFI6_8852C)
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rf->ic_type = RF_RTL8852C;
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if (rf->ic_type & RF_AX_1SS)
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rf->num_rf_path = 1;
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else if (rf->ic_type & RF_AX_2SS)
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rf->num_rf_path = 2;
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else if (rf->ic_type & RF_AX_3SS)
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rf->num_rf_path = 3;
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else if (rf->ic_type & RF_AX_4SS)
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rf->num_rf_path = 4;
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else
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rf->num_rf_path = 1;
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rf->manual_support_ability = 0xffffffff;
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rf->rf_init_ready = false;
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rf->rf_sys_up_time = 0;
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rf->rf_watchdog_en = true;
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rf->rf_ic_api_en = true;
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/*[Drv Dbg Info]*/
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rf->dbg_component = 0;
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rf->cmn_dbg_msg_period = 2;
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rf->cmn_dbg_msg_cnt = 0;
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/*@=== [HALRF Structure] ============================================*/
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switch (hal_i->chip_id) {
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#ifdef RF_8852A_SUPPORT
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case CHIP_WIFI6_8852A:
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rf->rfk_iqk_info = &rf_iqk_hwspec_8852a;
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break;
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#endif
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#ifdef RF_8852B_SUPPORT
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case CHIP_WIFI6_8852B:
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rf->rfk_iqk_info = &rf_iqk_hwspec_8852b;
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break;
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#endif
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default:
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break;
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}
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}
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void halrf_rfk_self_init(struct rf_info *rf)
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{
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struct halrf_iqk_info *iqk_info = &rf->iqk;
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struct halrf_gapk_info *txgapk_info = &rf->gapk;
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u8 path;
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RF_DBG(rf, DBG_RF_RFK, "===> %s\n", __func__);
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/* [TXGAPK init] */
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txgapk_info->is_gapk_init = false;
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/*[IQK init]*/
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iqk_info->is_iqk_init = false;
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/*[DPK init]*/
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halrf_dpk_init(rf);
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/*[RXBB BW]*/
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for (path = 0; path < KPATH; path++)
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rf->pre_rxbb_bw[path] = 0xff;
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}
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void halrf_rfability_init_mp(struct rf_info *rf)
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{
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//u64 support_ability = 0;
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switch (rf->ic_type) {
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#ifdef RF_8852A_SUPPORT
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case RF_RTL8852A:
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rf->support_ability |=
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/*HAL_RF_TX_PWR_TRACK |*/
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HAL_RF_TSSI_TRK |
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HAL_RF_IQK |
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/*HAL_RF_LCK |*/
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HAL_RF_DPK |
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HAL_RF_DACK |
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HAL_RF_TXGAPK |
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HAL_RF_DPK_TRACK |
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HAL_RF_RXDCK |
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HAL_RF_RXGAINK |
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HAL_RF_THER_TRIM |
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HAL_RF_PABIAS_TRIM |
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HAL_RF_TSSI_TRIM |
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/*HAL_RF_XTAL_TRACK |*/
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0;
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break;
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#endif
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#ifdef RF_8852B_SUPPORT
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case RF_RTL8852B:
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rf->support_ability |=
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/*HAL_RF_TX_PWR_TRACK |*/
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HAL_RF_IQK |
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/*HAL_RF_LCK |*/
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HAL_RF_DPK |
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HAL_RF_DACK |
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HAL_RF_TXGAPK |
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HAL_RF_DPK_TRACK |
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HAL_RF_RXDCK |
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/*HAL_RF_RXGAINK |*/
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HAL_RF_THER_TRIM |
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HAL_RF_PABIAS_TRIM |
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HAL_RF_TSSI_TRIM |
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/*HAL_RF_XTAL_TRACK |*/
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HAL_RF_TX_SHAPE |
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0;
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break;
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#endif
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#ifdef RF_8852C_SUPPORT
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case RF_RTL8852C:
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rf->support_ability =
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/*HAL_RF_TX_PWR_TRACK |*/
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/*HAL_RF_IQK |*/
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/*HAL_RF_LCK |*/
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/*HAL_RF_DPK |*/
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/*HAL_RF_DACK |*/
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/*HAL_RF_TXGAPK |*/
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/*HAL_RF_DPK_TRACK |*/
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0;
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break;
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#endif
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default:
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rf->support_ability =
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/*HAL_RF_TX_PWR_TRACK |*/
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/*HAL_RF_IQK |*/
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/*HAL_RF_LCK |*/
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/*HAL_RF_DPK |*/
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/*HAL_RF_DACK |*/
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/*HAL_RF_TXGAPK |*/
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/*HAL_RF_DPK_TRACK |*/
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0;
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break;
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}
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}
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void halrf_rfability_init(struct rf_info *rf)
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{
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switch (rf->ic_type) {
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#ifdef RF_8852A_SUPPORT
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case RF_RTL8852A:
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rf->support_ability =
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HAL_RF_TX_PWR_TRACK |
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HAL_RF_TSSI_TRK |
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HAL_RF_IQK |
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/*HAL_RF_LCK |*/
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HAL_RF_DPK |
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HAL_RF_DACK |
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HAL_RF_TXGAPK |
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HAL_RF_DPK_TRACK |
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HAL_RF_RXDCK |
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HAL_RF_RXGAINK |
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HAL_RF_THER_TRIM |
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HAL_RF_PABIAS_TRIM |
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HAL_RF_TSSI_TRIM |
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HAL_RF_XTAL_TRACK |
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0;
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break;
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#endif
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#ifdef RF_8852B_SUPPORT
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case RF_RTL8852B:
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rf->support_ability |=
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HAL_RF_TX_PWR_TRACK |
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HAL_RF_IQK |
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/*HAL_RF_LCK |*/
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HAL_RF_DPK |
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HAL_RF_DACK |
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HAL_RF_TXGAPK |
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HAL_RF_DPK_TRACK |
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HAL_RF_RXDCK |
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/*HAL_RF_RXGAINK |*/
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HAL_RF_THER_TRIM |
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HAL_RF_PABIAS_TRIM |
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HAL_RF_TSSI_TRIM |
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/*HAL_RF_XTAL_TRACK |*/
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HAL_RF_TX_SHAPE |
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0;
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break;
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#endif
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#ifdef RF_8852C_SUPPORT
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case RF_RTL8852C:
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rf->support_ability |=
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/*HAL_RF_TX_PWR_TRACK |*/
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/*HAL_RF_IQK |*/
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/*HAL_RF_LCK |*/
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/*HAL_RF_DPK |*/
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/*HAL_RF_DACK |*/
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/*HAL_RF_TXGAPK |*/
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/*HAL_RF_DPK_TRACK |*/
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0;
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break;
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#endif
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default:
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rf->support_ability =
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/*HAL_RF_TX_PWR_TRACK |*/
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/*HAL_RF_IQK |*/
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/*HAL_RF_LCK |*/
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/*HAL_RF_DPK |*/
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/*HAL_RF_DACK |*/
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/*HAL_RF_TXGAPK |*/
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/*HAL_RF_DPK_TRACK |*/
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0;
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break;
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}
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}
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void halrf_set_rfability(struct rf_info *rf)
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{
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if (rf->manual_support_ability &&
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rf->manual_support_ability != 0xffffffff)
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rf->support_ability = rf->manual_support_ability;
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else if (rf->phl_com->drv_mode == RTW_DRV_MODE_MP)
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halrf_rfability_init_mp(rf);
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else
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halrf_rfability_init(rf);
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PHL_INFO("[PHL]%x\n", rf->dbg_component);
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RF_DBG(rf, DBG_RF_INIT,
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"IC = ((0x%x)), mp=%d, RF_Supportability Init = ((0x%x))\n",
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rf->ic_type, rf->phl_com->drv_mode, rf->support_ability);
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}
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void halrf_rfe_init(struct rf_info *rf)
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{
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u8 rfe_type = rf->phl_com->dev_cap.rfe_type;
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switch (rf->ic_type) {
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#ifdef RF_8852A_SUPPORT
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case RF_RTL8852A:
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/*2G FEM check*/
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if (rfe_type == 11 || rfe_type == 12 || rfe_type == 17 ||
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rfe_type == 18 || rfe_type == 51 || rfe_type == 52 ||
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rfe_type == 53 || rfe_type == 54) {
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rf->fem.epa_2g = 1;
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rf->fem.elna_2g = 1;
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}
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/*5G FEM check*/
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if (rfe_type == 9 || rfe_type == 10 || rfe_type == 11 ||
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rfe_type == 12 || rfe_type == 15 || rfe_type == 16 ||
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rfe_type == 17 || rfe_type == 18 || rfe_type == 37 ||
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rfe_type == 38 || rfe_type == 51 || rfe_type == 52 ||
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rfe_type == 53 || rfe_type == 54) {
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rf->fem.epa_5g = 1;
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rf->fem.elna_5g = 1;
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}
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/*6G FEM check*/
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if (rfe_type == 13 || rfe_type == 14 || rfe_type == 15 ||
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rfe_type == 16 || rfe_type == 17 || rfe_type == 18 ||
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rfe_type == 37 || rfe_type == 38 || rfe_type == 51 ||
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rfe_type == 52 || rfe_type == 53 ||
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rfe_type == 54) {
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rf->fem.epa_6g = 1;
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rf->fem.elna_6g = 1;
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}
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break;
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#endif
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default:
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break;
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}
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}
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void halrf_rfe_type_gpio_setting(struct rf_info *rf)
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{
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u32 band = rf->hal_com->band[HW_PHY_0].cur_chandef.band;
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RF_DBG(rf, DBG_RF_INIT, "======>%s\n", __func__);
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halrf_set_gpio(rf, HW_PHY_0, (u8)band);
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}
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enum rtw_hal_status halrf_dm_init(void *rf_void)
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{
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struct rf_info *rf = (struct rf_info *)rf_void;
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enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
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if (!rf) {
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RF_DBG(rf, DBG_RF_INIT, "[%s] *rf = NULL", __func__);
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return RTW_HAL_STATUS_FAILURE;
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}
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halrf_cmn_info_self_init(rf);
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halrf_dbg_setting_init(rf);
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halrf_cmd_parser_init(rf);
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halrf_set_rfability(rf);
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halrf_rfe_init(rf);
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halrf_rfe_type_gpio_setting(rf);
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halrf_config_nctl_reg(rf);
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halrf_rfk_self_init(rf);
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/*Set Power table ref power*/
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halrf_set_ref_power_to_struct(rf, HW_PHY_0);
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halrf_rck_trigger(rf, HW_PHY_0);
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//halrf_gapk_save_tx_gain_8852a(rf);
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halrf_dack_trigger(rf, false);
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halrf_rx_dck_trigger(rf, HW_PHY_0, true);
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/*RX Gain K Get efuse*/
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/*halrf_get_efuse_rx_gain_k(rf, HW_PHY_0);*/
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/*Thermal Trim, PA Bias k, TSSI Trim get efuse and set reg*/
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halrf_get_efuse_trim(rf, HW_PHY_0);
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/*TSSI Init*/
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halrf_tssi_get_efuse_ex(rf, HW_PHY_0);
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/*halrf_tssi_get_efuse_ex(rf, HW_PHY_1);*/
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/*Set MAC 0xd220[1]=0 r_txagc_BT_en=0 by Bryant*/
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if (rf->phl_com->drv_mode == RTW_DRV_MODE_MP)
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halrf_wl_tx_power_control(rf, 0xffffffff);
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halrf_fcs_init(rf);
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return hal_status;
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}
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enum rtw_hal_status halrf_init(struct rtw_phl_com_t *phl_com,
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struct rtw_hal_com_t *hal_com, void **rf_out)
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{
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//enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
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struct rf_info *rf = NULL;
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rf = hal_mem_alloc(hal_com, sizeof(struct rf_info));
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if (!rf)
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return RTW_HAL_STATUS_RF_INIT_FAILURE;
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*rf_out = rf;
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// PHL_INFO("[PHL] %s - halrf(%p), *rf(%p)\n", __func__, halrf, *rf);
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// PHL_INFO("[PHL] %s\n", __func__);
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rf->phl_com = phl_com;/*shared memory for all components*/
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rf->hal_com = hal_com;/*shared memory for phl and hal*/
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return RTW_HAL_STATUS_SUCCESS;
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}
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void halrf_deinit(struct rtw_phl_com_t *phl_com,
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struct rtw_hal_com_t *hal_com, void *rf)
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{
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//enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
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struct rf_info *halrf = (struct rf_info *)rf;
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/*stop FSM of RF or free memory*/
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PHL_INFO("[PHL] %s - halrf(%p)\n", __func__, halrf);
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if(halrf) {
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hal_mem_free(hal_com, halrf, sizeof(struct rf_info));
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}
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}
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