/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#include "halrf_precomp.h"
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struct halrf_cmd_info {
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char name[16];
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u8 id;
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};
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enum HALRF_CMD_ID {
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HALRF_HELP,
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HALRF_SUPPORTABILITY,
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HALRF_DBG_COMP,
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HALRF_PROFILE,
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HALRF_IQK,
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HALRF_IQK_DEBUG,
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HALRF_DPK,
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HALRF_DACK,
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HALRF_DACK_DEBUG,
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HALRF_RX_DCK,
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HALRF_DUMP_RFK_REG,
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HALRF_LO_TEST,
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#ifdef CONFIG_2G_BAND_SHIFT
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HAL_BAND_SHIFT,
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#endif
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HALRF_RCK,
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HALRF_WATCHDOG,
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HALRF_SINGLETONE_EN,
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HALRF_IQK_BYPASS,
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HALRF_IQK_KLOG,
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HALRF_TSSI,
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HALRF_PWR_TABLE,
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HALRF_IQK_DBCC,
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HALRF_RFK_CHECK,
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HALRF_RFK_TEST,
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HALRF_TXGAPK,
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HALRF_FW_IQK,
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HALRF_DUMP,
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HALRF_IQK_RXIMR,
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HALRF_THER,
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HALRF_XTAL_TRK,
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HALRF_HWTX
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};
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struct halrf_cmd_info halrf_cmd_i[] = {
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{"-h", HALRF_HELP},
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{"ability", HALRF_SUPPORTABILITY},
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{"dbg", HALRF_DBG_COMP},
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{"profile", HALRF_PROFILE},
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{"iqk", HALRF_IQK},
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{"dpk", HALRF_DPK},
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{"dack", HALRF_DACK},
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{"dack_dbg", HALRF_DACK_DEBUG},
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{"rx_dck", HALRF_RX_DCK},
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{"dump_rfk_reg", HALRF_DUMP_RFK_REG},
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{"lo_test", HALRF_LO_TEST},
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{"rck", HALRF_RCK},
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{"rfk_check", HALRF_RFK_CHECK},
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#ifdef CONFIG_2G_BAND_SHIFT
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{"band_shift", HAL_BAND_SHIFT},
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#endif
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{"watchdog_stop", HALRF_WATCHDOG},
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{"iqk_tone", HALRF_SINGLETONE_EN},
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{"iqk_bypass", HALRF_IQK_BYPASS},
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{"iqk_klog", HALRF_IQK_KLOG},
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{"iqk_dbcc", HALRF_IQK_DBCC},
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{"iqk_rximr", HALRF_IQK_RXIMR},
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{"tssi", HALRF_TSSI},
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{"pwr_table", HALRF_PWR_TABLE},
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{"test", HALRF_RFK_TEST},
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{"txgapk", HALRF_TXGAPK},
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{"iqk_fw", HALRF_FW_IQK},
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{"dump", HALRF_DUMP},
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{"ther", HALRF_THER},
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{"xtal_trk", HALRF_XTAL_TRK},
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{"hwtx", HALRF_HWTX},
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};
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void halrf_cmd_parser(struct rf_info *rf, char input[][RF_MAX_ARGV],
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u32 input_num, char *output, u32 out_len)
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{
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struct rf_dbg_cmd_info *rf_dbg_cmd = &rf->rf_dbg_cmd_i;
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u32 used = 0;
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u8 id = 0;
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u32 i, val_1 = 0, val_2 = 0;
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u32 halrf_ary_size = rf_dbg_cmd->cmd_size;
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RF_DBG_CNSL(out_len, used, output + used, out_len - used, "\n");
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/* Parsing Cmd ID */
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if (input_num) {
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for (i = 0; i < halrf_ary_size; i++) {
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if (_os_strcmp(halrf_cmd_i[i].name, input[0]) == 0) {
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id = halrf_cmd_i[i].id;
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break;
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}
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}
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if (i == halrf_ary_size) {
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"HALRF command not found!\n");
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return;
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}
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}
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switch (id) {
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case HALRF_HELP: {
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"RF cmd ==>\n");
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for (i = 0; i < halrf_ary_size - 1; i++)
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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" %-5d: %s\n", i, halrf_cmd_i[i + 1].name);
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}
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break;
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case HALRF_SUPPORTABILITY:
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halrf_support_ability(rf, input, &used, output, &out_len);
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break;
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case HALRF_DBG_COMP:
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halrf_dbg_trace(rf, input, &used, output, &out_len);
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break;
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case HALRF_DUMP_RFK_REG:
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halrf_dump_rfk_reg(rf, input, &used, output, &out_len);
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break;
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case HALRF_IQK:
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halrf_iqk_dbg_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_DPK:
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halrf_dpk_dbg_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_DACK:
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halrf_dack_dbg_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_RX_DCK:
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halrf_rx_dck_dbg_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_LO_TEST:
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_os_sscanf(input[1], "%d", &val_1);
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_os_sscanf(input[2], "%d", &val_2);
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"S%d LO test %s!!\n", val_2, val_1 ? "on" : "off");
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halrf_lo_test(rf, (bool)val_1, val_2);
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break;
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case HALRF_RCK:
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halrf_rck_trigger(rf, HW_PHY_0);
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break;
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case HALRF_WATCHDOG:
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_os_sscanf(input[1], "%d", &val_1);
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rf->is_watchdog_stop = (bool)val_1;
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if (val_1 == true)
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"Halrf watchdog STOP!!\n");
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else
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"Halrf watchdog GO!!\n");
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break;
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case HALRF_SINGLETONE_EN:
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"[IQK]single tone enable => 0: path 0; 1: path 1\n");
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_os_sscanf(input[1], "%d", &val_1);
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halrf_iqk_toneleakage(rf, val_1 & 0x1);
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break;
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case HALRF_IQK_BYPASS:
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halrf_iqk_bypass_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_IQK_KLOG:
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halrf_iqk_klog_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_TSSI:
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halrf_tssi_dbg_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_PWR_TABLE:
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halrf_pwr_table_dbg_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_IQK_DBCC:
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"[IQK]dbcc enable => 0: PHY0; 1: PHY1\n");
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_os_sscanf(input[1], "%d", &val_1);
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halrf_iqk_dbcc(rf, val_1 & 0x1);
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break;
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case HALRF_RFK_CHECK:
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halrf_rfk_check_reg_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_RFK_TEST:
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halrf_test_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_TXGAPK:
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halrf_txgapk_dbg_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_FW_IQK:
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"[IQK] IQK TYPE => 0: DRV, 1: FW\n");
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_os_sscanf(input[1], "%d", &val_1);
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halrf_enable_fw_iqk(rf, val_1 & 0x1);
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break;
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case HALRF_DUMP:
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halrf_dump_rf_reg_cmd(rf, input, &used, output, &out_len);
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break;
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case HALRF_IQK_RXIMR:
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"[IQK] -path -idx \n");
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_os_sscanf(input[1], "%d", &val_1);
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_os_sscanf(input[2], "%d", &val_2);
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i= halrf_iqk_get_rximr(rf, (u8)val_1, val_2);
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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" dec, rximr = %d !!\n", i);
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break;
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case HALRF_THER:
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"Thermal A: %d\n", halrf_get_thermal(rf, RF_PATH_A));
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"Thermal B: %d\n", halrf_get_thermal(rf, RF_PATH_B));
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break;
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case HALRF_XTAL_TRK:
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"Xtal Tracking offset PHY0 : %d\n",
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halrf_xtal_tracking_offset(rf, 0));
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"Xtal Tracking offset PHY1 : %d\n",
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halrf_xtal_tracking_offset(rf, 1));
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break;
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case HALRF_HWTX:
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{
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u32 value[10] = {0};
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u8 i;
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for (i = 0; i < 4; i++)
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if (input[i + 1])
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_os_sscanf(input[i + 1], "%d", &value[i]);
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if (_os_strcmp(input[1], "-h") == 0) {
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"echo rf hwtx enable path cnt dB\n");
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"Enable / Disable = 1 / 0\n");
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"PathA / PathB = 0 / 1\n");
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"EX:echo rf hwtx 1 0 0 10\n");
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}
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"==>Enable:%d Path:%d Count:%d Power:%ddB\n", value[0], value[1], value[2], value[3]);
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//halrf_tssi_hw_tx_8852a(rf, 0, path, cnt, dbm, T_HT_MF, 0, enable);
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if (value[0] == 1) {
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"HW TX Start\n");
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halrf_btc_rfk_ntfy(rf, (BIT(HW_PHY_0) << 4), RF_BTC_TSSI, RFK_START);
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halrf_tmac_tx_pause(rf, HW_PHY_0, true);
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halrf_hw_tx(rf, (u8)value[1], (u16)value[2],
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(s16)(value[3] * 4), T_HT_MF, 0, 1);
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}
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if (value[0] == 0) {
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"HW TX Stop\n");
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halrf_hw_tx(rf, (u8)value[1], (u16)value[2],
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(s16)(value[3] * 4), T_HT_MF, 0, 0);
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halrf_tx_mode_switch(rf, HW_PHY_0, 0);
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halrf_tmac_tx_pause(rf, HW_PHY_0, false);
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halrf_btc_rfk_ntfy(rf, (BIT(HW_PHY_0) << 4), RF_BTC_TSSI, RFK_STOP);
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}
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}
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break;
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default:
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RF_DBG_CNSL(out_len, used, output + used, out_len - used,
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"Do not support this command\n");
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break;
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}
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}
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void halrf_cmd_parser_init(struct rf_info *rf)
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{
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struct rf_dbg_cmd_info *rf_dbg_cmd = &rf->rf_dbg_cmd_i;
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rf_dbg_cmd->cmd_size = sizeof(halrf_cmd_i) / sizeof(struct halrf_cmd_info);
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}
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#if 0
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#ifndef strsep
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char *strsep(char **s, const char *ct)
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{
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char *sbegin = *s;
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char tmp = 0;
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char *end = &tmp;
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if (!sbegin)
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return NULL;
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//end = strpbrk(sbegin, ct);
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if (end)
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*end++ = '\0';
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*s = end;
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return sbegin;
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}
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#endif
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#endif
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s32 halrf_cmd(struct rf_info *rf, char *input, char *output, u32 out_len)
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{
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char *token;
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u32 argc = 0;
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char argv[RF_MAX_ARGC][RF_MAX_ARGV];
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do {
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token = _os_strsep(&input, ", "); //smae name in bb
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if (token) {
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if (_os_strlen(token) <= RF_MAX_ARGV)
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_os_strcpy(argv[argc], token);
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argc++;
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} else {
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break;
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}
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} while (argc < RF_MAX_ARGC);
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if (argc == 1)
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argv[0][_os_strlen(argv[0]) - 1] = '\0';
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halrf_cmd_parser(rf, argv, argc, output, out_len);
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return 0;
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}
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u32 halrf_get_multiple(u8 pow, u8 base)
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{
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u8 i;
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u32 return_value = 1;
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for (i = 0; i < pow; i++)
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return_value *= base; /*base ^ pow*/
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return return_value;
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}
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u32 halrf_str_2_dec(u8 val)
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{
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if (val >= 0x30 && val <= 0x39) /*0~9*/
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return (val - 0x30);
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else if (val >= 0x41 && val <= 0x46) /*A~F*/
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return (val - 0x41 + 10);
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else if (val >= 0x61 && val <= 0x66) /*a~f*/
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return (val - 0x61 + 10);
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else
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return 1;
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}
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void halrf_scanf(char *in, enum rf_scanf_type type, u32 *out)
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{
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char buff[HALRF_DCMD_SCAN_LIMIT];
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u32 multiple = 1;
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u8 text_num = 0;
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u8 base = 10;
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u8 i = 0, j = 0;
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*out = 0;
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for (i = 0; i < HALRF_DCMD_SCAN_LIMIT; i++) {
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if (in[i] != 0x0) { /* 0x0 = NULL. */
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buff[i] = in[i];
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continue;
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}
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if (type == DCMD_CHAR) {
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*out = *in;
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break;
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}
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base = (type == DCMD_DECIMAL) ? 10 : 16;
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text_num = i;
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for (j = 0; j < text_num; j++) {
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multiple = halrf_get_multiple(text_num - 1 - j, base);
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*out += halrf_str_2_dec(buff[j]) * multiple;
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}
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break;
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}
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}
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