/******************************************************************************
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*
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* Copyright(c) 2007 - 2020 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef _HALRF_EFUSE_8852B_H_
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#define _HALRF_EFUSE_8852B_H_
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#ifdef RF_8852B_SUPPORT
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enum halrf_efsue_info_8852b_offset {
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EFUSE_INFO_RF_BOARD_OPTION_8852B_ADDR = 0x2c1,
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EFUSE_INFO_RF_RFE_8852B_ADDR = 0x2ca,
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EFUSE_INFO_RF_CHAN_PLAN_8852B_ADDR = 0x2b8,
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EFUSE_INFO_RF_XTAL_8852B_ADDR = 0x2b9,
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EFUSE_INFO_RF_THERMAL_A_8852B_ADDR = 0x2d0,
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EFUSE_INFO_RF_THERMAL_B_8852B_ADDR = 0x2d1,
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EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_1_8852B_ADDR = 0x210,
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EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_2_8852B_ADDR = 0x211,
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EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_3_8852B_ADDR = 0x212,
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EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_4_8852B_ADDR = 0x213,
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EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_5_8852B_ADDR = 0x214,
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EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_6_8852B_ADDR = 0x215,
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EFUSE_INFO_RF_2G_BW40M_A_TSSI_DE_1_8852B_ADDR = 0x216,
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EFUSE_INFO_RF_2G_BW40M_A_TSSI_DE_2_8852B_ADDR = 0x217,
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EFUSE_INFO_RF_2G_BW40M_A_TSSI_DE_3_8852B_ADDR = 0x218,
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EFUSE_INFO_RF_2G_BW40M_A_TSSI_DE_4_8852B_ADDR = 0x219,
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EFUSE_INFO_RF_2G_BW40M_A_TSSI_DE_5_8852B_ADDR = 0x21a,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_1_8852B_ADDR = 0x222,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_2_8852B_ADDR = 0x223,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_3_8852B_ADDR = 0x224,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_4_8852B_ADDR = 0x225,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_5_8852B_ADDR = 0x226,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_6_8852B_ADDR = 0x227,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_7_8852B_ADDR = 0x228,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_8_8852B_ADDR = 0x229,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_9_8852B_ADDR = 0x22a,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_10_8852B_ADDR = 0x22b,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_11_8852B_ADDR = 0x22c,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_12_8852B_ADDR = 0x22d,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_13_8852B_ADDR = 0x22e,
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EFUSE_INFO_RF_5G_BW40M_A_TSSI_DE_14_8852B_ADDR = 0x22f,
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EFUSE_INFO_RF_2G_CCK_B_TSSI_DE_1_8852B_ADDR = 0x23a,
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EFUSE_INFO_RF_2G_CCK_B_TSSI_DE_2_8852B_ADDR = 0x23b,
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EFUSE_INFO_RF_2G_CCK_B_TSSI_DE_3_8852B_ADDR = 0x23c,
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EFUSE_INFO_RF_2G_CCK_B_TSSI_DE_4_8852B_ADDR = 0x23d,
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EFUSE_INFO_RF_2G_CCK_B_TSSI_DE_5_8852B_ADDR = 0x23e,
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EFUSE_INFO_RF_2G_CCK_B_TSSI_DE_6_8852B_ADDR = 0x23f,
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EFUSE_INFO_RF_2G_BW40M_B_TSSI_DE_1_8852B_ADDR = 0x240,
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EFUSE_INFO_RF_2G_BW40M_B_TSSI_DE_2_8852B_ADDR = 0x241,
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EFUSE_INFO_RF_2G_BW40M_B_TSSI_DE_3_8852B_ADDR = 0x242,
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EFUSE_INFO_RF_2G_BW40M_B_TSSI_DE_4_8852B_ADDR = 0x243,
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EFUSE_INFO_RF_2G_BW40M_B_TSSI_DE_5_8852B_ADDR = 0x244,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_1_8852B_ADDR = 0x24c,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_2_8852B_ADDR = 0x24d,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_3_8852B_ADDR = 0x24e,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_4_8852B_ADDR = 0x24f,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_5_8852B_ADDR = 0x250,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_6_8852B_ADDR = 0x251,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_7_8852B_ADDR = 0x252,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_8_8852B_ADDR = 0x253,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_9_8852B_ADDR = 0x254,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_10_8852B_ADDR = 0x255,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_11_8852B_ADDR = 0x256,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_12_8852B_ADDR = 0x257,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_13_8852B_ADDR = 0x258,
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EFUSE_INFO_RF_5G_BW40M_B_TSSI_DE_14_8852B_ADDR = 0x259,
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EFUSE_INFO_RF_RX_GAIN_K_A_2G_CCK_8852B_ADDR = 0x2d6,
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EFUSE_INFO_RF_RX_GAIN_K_A_2G_OFMD_8852B_ADDR = 0x2d4,
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EFUSE_INFO_RF_RX_GAIN_K_A_5GL_8852B_ADDR = 0x2d8,
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EFUSE_INFO_RF_RX_GAIN_K_A_5GM_8852B_ADDR = 0x2da,
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EFUSE_INFO_RF_RX_GAIN_K_A_5GH_8852B_ADDR = 0x2dc
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};
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enum halrf_efsue_default_value_8852b {
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EFUSE_INFO_RF_RFE_8852B_VALUE = 0x1,
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EFUSE_INFO_RF_CHAN_PLAN_8852B_VALUE = 0x7f,
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EFUSE_INFO_RF_XTAL_8852B_VALUE = 0x3f,
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EFUSE_INFO_RF_THERMAL_A_8852B_VALUE = 0x22,
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EFUSE_INFO_RF_THERMAL_B_8852B_VALUE = 0x22,
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EFUSE_INFO_RF_TSSI_DE_8852B_VALUE = 0x0,
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EFUSE_INFO_RF_RX_GAIN_K_8852B_VALUE = 0xf,
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EFUSE_INFO_RF_BOARD_OPTION_8852B_VALUE = 0x1
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};
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bool halrf_get_efuse_info_8852b(struct rf_info *rf, u8 *efuse_map,
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enum rtw_efuse_info id, void *value, u32 length,
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u8 autoload_status);
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#endif /*RF_8852B_SUPPORT*/
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#endif /*_HALRF_EFUSE_8852B_H_*/
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