/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _HAL_RX_C_
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#include "hal_headers.h"
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void rtw_hal_cfg_rxhci(void *hal, u8 en)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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PHL_TRACE(COMP_PHL_DBG, _PHL_DEBUG_, "%s : enable %d.\n", __func__, en);
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if (RTW_HAL_STATUS_SUCCESS != rtw_hal_mac_cfg_rxhci(hal_info, en))
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PHL_ERR("%s failure \n", __func__);
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}
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enum rtw_hal_status
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rtw_hal_set_rxfltr_by_mode(void *hal, u8 band, enum rtw_rx_fltr_mode mode)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct rtw_hal_com_t *hal_com = hal_info->hal_com;
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enum rtw_hal_status hstatus = RTW_HAL_STATUS_FAILURE;
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enum rtw_rx_fltr_mode set_mode = -1;
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PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "%s : band(%d), mode(%d)\n",
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__func__, band, mode);
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/* Note: @hal_info_t.rx_fltr_mode is used to recored any mode other than
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* sniffer mode, it effectively records the mode before entering monitor
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* mode and the subsequent modes set after entering monitor mode.
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*/
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if ((mode == RX_FLTR_MODE_SNIFFER && hal_info->monitor_mode) ||
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(mode == RX_FLTR_MODE_RESTORE && !hal_info->monitor_mode))
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return RTW_HAL_STATUS_FAILURE;
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if (hal_info->monitor_mode && mode != RX_FLTR_MODE_RESTORE) {
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hal_info->rx_fltr_mode = mode;
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return RTW_HAL_STATUS_SUCCESS;
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}
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set_mode = (mode == RX_FLTR_MODE_RESTORE) ?
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hal_info->rx_fltr_mode : mode;
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hstatus = rtw_hal_mac_set_rxfltr_by_mode(hal_com, band, set_mode);
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if (hstatus != RTW_HAL_STATUS_SUCCESS)
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return hstatus;
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hal_info->monitor_mode = (mode == RX_FLTR_MODE_SNIFFER);
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/* Record @hal_info_t.rx_fltr_mode only when the mode is not monitor and
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* restore, otherwise, it is kept intact.
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* TODO: The rx fltr mode should be recorded separately for each band.
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*/
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if (mode != RX_FLTR_MODE_SNIFFER &&
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mode != RX_FLTR_MODE_RESTORE)
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hal_info->rx_fltr_mode = mode;
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return RTW_HAL_STATUS_SUCCESS;
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}
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enum rtw_rx_fltr_mode rtw_hal_get_rxfltr_mode(void *hal, u8 band)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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return (hal_info->monitor_mode) ? RX_FLTR_MODE_SNIFFER :
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hal_info->rx_fltr_mode;
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}
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enum rtw_hal_status rtw_hal_scan_set_rxfltr_by_mode(void *hinfo,
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enum phl_phy_idx phy_idx, bool off_channel, u8 *mode)
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{
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enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
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if (off_channel) {
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/* backup rx filter mode */
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*mode = rtw_hal_get_rxfltr_mode(hinfo, phy_idx);
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hal_status = rtw_hal_set_rxfltr_by_mode(hinfo,
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phy_idx, RX_FLTR_MODE_SCAN);
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} else {
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/* restore rx filter mode */
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hal_status = rtw_hal_set_rxfltr_by_mode(hinfo,
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phy_idx, *mode);
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}
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return hal_status;
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}
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enum rtw_hal_status
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rtw_hal_enter_mon_mode(void *hinfo, enum phl_phy_idx phy_idx)
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{
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return rtw_hal_set_rxfltr_by_mode(hinfo, phy_idx, RX_FLTR_MODE_SNIFFER);
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}
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enum rtw_hal_status
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rtw_hal_leave_mon_mode(void *hinfo, enum phl_phy_idx phy_idx)
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{
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return rtw_hal_set_rxfltr_by_mode(hinfo, phy_idx, RX_FLTR_MODE_RESTORE);
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}
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enum rtw_hal_status rtw_hal_acpt_crc_err_pkt(void *hal, u8 band, u8 enable)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct rtw_hal_com_t *hal_com = hal_info->hal_com;
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return rtw_hal_mac_set_rxfltr_acpt_crc_err(hal_com, band, enable);
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}
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enum rtw_hal_status rtw_hal_set_rxfltr_mpdu_size(void *hal, u8 band, u16 size)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct rtw_hal_com_t *hal_com = hal_info->hal_com;
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return rtw_hal_mac_set_rxfltr_mpdu_size(hal_com, band, size);
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}
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enum rtw_hal_status rtw_hal_set_rxfltr_by_type(void *hal, u8 band, u8 type, u8 target)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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enum rtw_hal_status hstats = RTW_HAL_STATUS_FAILURE;
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hstats = rtw_hal_mac_set_rxfltr_by_type(hal_info->hal_com, band, type, target);
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if (RTW_HAL_STATUS_SUCCESS != hstats)
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PHL_ERR("%s : type %u status %u target %u.band %u \n", __func__, type, hstats, target, band);
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return hstats;
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}
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enum rtw_hal_status
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rtw_hal_poll_hw_rx_done(void *hal)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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enum rtw_hal_status sts = RTW_HAL_STATUS_SUCCESS;
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sts = rtw_hal_mac_poll_hw_rx_done(hal_info);
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return sts;
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}
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enum rtw_hal_status
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rtw_hal_hw_rx_resume(void *hal)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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enum rtw_hal_status sts = RTW_HAL_STATUS_SUCCESS;
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sts = rtw_hal_mac_hw_rx_resume(hal_info);
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return sts;
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}
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#ifdef CONFIG_PCI_HCI
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/**
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* rtw_hal_rx_res_query - query current HW rx resource with specifc dma channel
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* @hal: see struct hal_info_t
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* @dma_ch: the target dma channel
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* @host_idx: current host index of this channel
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* @hw_idx: current hw index of this channel
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*
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* this function returns the number of available tx resource
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* NOTE, input host_idx and hw_idx ptr shall NOT be NULL
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*/
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u16 rtw_hal_rx_res_query(void *hal, u8 dma_ch, u16 *host_idx, u16 *hw_idx)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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u16 res_num = 0;
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res_num = trx_ops->query_rx_res(hal_info->hal_com, dma_ch, host_idx,
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hw_idx);
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return res_num;
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}
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/**
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* rtw_hal_query_rxch_num - query total hw rx dma channels number
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*
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* returns the number of hw rx dma channel
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*/
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u8 rtw_hal_query_rxch_num(void *hal)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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u8 ch_num = 0;
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ch_num = trx_ops->query_rxch_num();
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return ch_num;
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}
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u8 rtw_hal_check_rxrdy(struct rtw_phl_com_t *phl_com, void* hal, u8 *rxbuf, u8 dma_ch)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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u8 res = 0;
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res = trx_ops->check_rxrdy(phl_com, rxbuf, dma_ch);
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return res;
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}
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u8 rtw_hal_handle_rxbd_info(void* hal, u8 *rxbuf, u16 *buf_size)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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u8 res = 0;
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res = trx_ops->handle_rxbd_info(hal_info, rxbuf, buf_size);
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return res;
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}
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enum rtw_hal_status
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rtw_hal_update_rxbd(void *hal, struct rx_base_desc *rxbd,
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struct rtw_rx_buf *rxbuf)
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{
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enum rtw_hal_status hstatus = RTW_HAL_STATUS_FAILURE;
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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hstatus = trx_ops->update_rxbd(hal_info, rxbd, rxbuf);
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return hstatus;
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}
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enum rtw_hal_status rtw_hal_notify_rxdone(void* hal,
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struct rx_base_desc *rxbd, u8 ch, u16 rxcnt)
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{
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enum rtw_hal_status hstatus = RTW_HAL_STATUS_FAILURE;
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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hstatus = trx_ops->notify_rxdone(hal_info, rxbd, ch, rxcnt);
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return hstatus;
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}
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u16 rtw_hal_handle_wp_rpt(void *hal, u8 *rp, u16 len, u8 *sw_retry, u8 *dma_ch,
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u16 *wp_seq, u8 *txsts)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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u16 rsize = 0;
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rsize = trx_ops->handle_wp_rpt(hal_info, rp, len, sw_retry, dma_ch,
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wp_seq, txsts);
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return rsize;
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}
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#endif /*CONFIG_PCI_HCI*/
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#ifdef CONFIG_USB_HCI
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enum rtw_hal_status
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rtw_hal_query_info(void* hal, u8 info_id, void *value)
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{
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enum rtw_hal_status hstatus = RTW_HAL_STATUS_FAILURE;
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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hstatus = trx_ops->query_hal_info(hal_info, info_id, value);
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return hstatus;
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}
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enum rtw_hal_status
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rtw_hal_usb_rx_agg_cfg(void *hal, u8 mode, u8 agg_mode,
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u8 drv_define, u8 timeout, u8 size, u8 pkt_num)
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{
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enum rtw_hal_status hstatus = RTW_HAL_STATUS_SUCCESS;
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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hstatus = trx_ops->usb_rx_agg_cfg(hal, mode, agg_mode,
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drv_define, timeout, size, pkt_num);
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return hstatus;
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}
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u16 rtw_hal_handle_wp_rpt_usb(void *hal, u8 *rp, u16 len, u8 *macid, u8 *ac_queue,
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u8 *txsts)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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u16 rsize = 0;
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rsize = trx_ops->handle_wp_rpt(hal_info, rp, len, macid, ac_queue, txsts);
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return rsize;
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}
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#endif
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enum rtw_hal_status
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rtw_hal_handle_rx_buffer(struct rtw_phl_com_t *phl_com, void* hal,
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u8 *buf, u32 buf_size,
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struct rtw_phl_rx_pkt *rxpkt)
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{
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enum rtw_hal_status hstatus = RTW_HAL_STATUS_FAILURE;
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct hal_trx_ops *trx_ops = hal_info->trx_ops;
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hstatus = trx_ops->handle_rx_buffer(phl_com, hal_info,
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buf, buf_size, rxpkt);
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return hstatus;
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}
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#ifdef CONFIG_SDIO_HCI
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void rtw_hal_sdio_rx_agg_cfg(void *hal, bool enable, u8 drv_define,
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u8 timeout, u8 size, u8 pkt_num)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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rtw_hal_mac_sdio_rx_agg_cfg(hal_info->hal_com, enable, drv_define,
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timeout, size, pkt_num);
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}
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int rtw_hal_sdio_rx(void *hal, struct rtw_rx_buf *rxbuf)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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return rtw_hal_mac_sdio_rx(hal_info->hal_com, rxbuf);
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}
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int rtw_hal_sdio_parse_rx(void *hal, struct rtw_rx_buf *rxbuf)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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return rtw_hal_mac_sdio_parse_rx(hal_info->hal_com, rxbuf);
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}
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#endif /* CONFIG_SDIO_HCI */
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void
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hal_rx_ppdu_sts_normal_data(struct rtw_phl_com_t *phl_com,
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void *hdr,
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struct rtw_r_meta_data *meta)
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{
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struct rtw_phl_ppdu_sts_info *ppdu_info = NULL;
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enum phl_band_idx band = HW_BAND_0;
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do {
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if ((NULL == phl_com) || (NULL == meta))
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break;
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ppdu_info = &phl_com->ppdu_sts_info;
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band = (meta->bb_sel > 0) ? HW_BAND_1 : HW_BAND_0;
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if ((ppdu_info->cur_rx_ppdu_cnt[band] == meta->ppdu_cnt) &&
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(false == ppdu_info->latest_rx_is_psts[band])) {
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/**
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* add condition to avoid check fail for ppdu cnt run around 0 -> 1 -> ... -> 0
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* example :
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* [frame_A(ppdu_cnt = 0)] -> [ppdu_sts(ppdu_cnt = 0)]
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* ->[ppdu_sts(ppdu_cnt = 1)] -> [ppdu_sts(ppdu_cnt = 2)] ...
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* ... ->[ppdu_sts(ppdu_cnt = 7)] -> [frame_B(ppdu_cnt = 0)] ...
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* Therefore, frame_B has same ppdu_cnt with frame_A.
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* But they are different PPDU.
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**/
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break;
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}
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meta->ppdu_cnt_chg = true;
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/* start of the PPDU */
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ppdu_info->latest_rx_is_psts[band] = false;
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ppdu_info->sts_ent[band][meta->ppdu_cnt].addr_cam_vld = meta->addr_cam_vld;
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ppdu_info->sts_ent[band][meta->ppdu_cnt].frame_type = PHL_GET_80211_HDR_TYPE(hdr);
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ppdu_info->sts_ent[band][meta->ppdu_cnt].crc32 = meta->crc32;
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ppdu_info->sts_ent[band][meta->ppdu_cnt].rx_rate = meta->rx_rate;
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ppdu_info->sts_ent[band][meta->ppdu_cnt].ppdu_type = meta->ppdu_type;
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if(RTW_IS_BEACON_OR_PROBE_RESP_PKT(ppdu_info->sts_ent[band][meta->ppdu_cnt].frame_type)) {
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PHL_GET_80211_HDR_ADDRESS3(phl_com->drv_priv, hdr,
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ppdu_info->sts_ent[band][meta->ppdu_cnt].src_mac_addr);
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}
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else if (meta->a1_match &&
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RTW_IS_ASOC_REQ_PKT(ppdu_info->sts_ent[band][meta->ppdu_cnt].frame_type)) {
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PHL_GET_80211_HDR_ADDRESS2(phl_com->drv_priv, hdr,
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ppdu_info->sts_ent[band][meta->ppdu_cnt].src_mac_addr);
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#ifdef DBG_AP_CLIENT_ASSOC_RSSI
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{
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u8 *src = NULL;
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src = ppdu_info->sts_ent[band][meta->ppdu_cnt].src_mac_addr;
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PHL_INFO("%s [Rx-ASOC_REQ] - MAC-Addr:%02x-%02x-%02x-%02x-%02x-%02x, a1_match:%d ppdu_cnt:%d\n",
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__func__,
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src[0], src[1], src[2], src[3], src[4], src[5],
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meta->a1_match,
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meta->ppdu_cnt);
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}
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#endif
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}
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else {
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_os_mem_cpy(phl_com->drv_priv,
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ppdu_info->sts_ent[band][meta->ppdu_cnt].src_mac_addr,
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meta->ta, MAC_ADDRESS_LENGTH);
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}
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ppdu_info->sts_ent[band][meta->ppdu_cnt].valid = false;
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ppdu_info->cur_rx_ppdu_cnt[band] = meta->ppdu_cnt;
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PHL_TRACE(COMP_PHL_PSTS, _PHL_INFO_,
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"Start of the PPDU : band %d ; ppdu_cnt %d ; frame_type %d ; addr_cam_vld %d ; size %d ; rate 0x%x ; crc32 %d\n",
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band,
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ppdu_info->cur_rx_ppdu_cnt[band],
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ppdu_info->sts_ent[band][meta->ppdu_cnt].frame_type,
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ppdu_info->sts_ent[band][meta->ppdu_cnt].addr_cam_vld,
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meta->pktlen,
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meta->rx_rate,
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meta->crc32);
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} while (false);
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}
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void
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hal_rx_ppdu_sts(struct rtw_phl_com_t *phl_com,
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struct rtw_phl_rx_pkt *phl_rx,
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struct hal_ppdu_sts *ppdu_sts)
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{
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struct rtw_phl_ppdu_sts_info *ppdu_info = NULL;
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struct rtw_phl_rssi_stat *rssi_stat = NULL;
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struct rtw_r_meta_data *meta = &(phl_rx->r.mdata);
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struct rtw_phl_ppdu_phy_info *phy_info = &(phl_rx->r.phy_info);
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u8 i = 0;
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enum phl_band_idx band = HW_BAND_0;
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struct rtw_phl_ppdu_sts_ent *sts_ent = NULL;
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if ((NULL == phl_com) || (NULL == meta) || (NULL == ppdu_sts))
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return;
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ppdu_info = &phl_com->ppdu_sts_info;
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rssi_stat = &phl_com->rssi_stat;
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band = (meta->bb_sel > 0) ? HW_BAND_1 : HW_BAND_0;
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ppdu_info->latest_rx_is_psts[band] = true;
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if (0 == phy_info->is_valid)
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return;
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if (ppdu_info->cur_rx_ppdu_cnt[band] != meta->ppdu_cnt) {
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PHL_TRACE(COMP_PHL_PSTS, _PHL_INFO_,
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"[WARNING] ppdu cnt mis-match (band %d ; cur : %d , rxmeta : %d)\n",
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band,
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ppdu_info->cur_rx_ppdu_cnt[band],
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meta->ppdu_cnt);
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}
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sts_ent = &(ppdu_info->sts_ent[band][meta->ppdu_cnt]);
|
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if (meta->crc32 || sts_ent->crc32) {
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UPDATE_MA_RSSI(rssi_stat, RTW_RSSI_UNKNOWN,
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phy_info->rssi);
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return;
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}
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if (sts_ent->rx_rate != meta->rx_rate) {
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PHL_TRACE(COMP_PHL_PSTS, _PHL_INFO_,
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"[WARNING] PPDU STS rx rate mis-match\n");
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UPDATE_MA_RSSI(rssi_stat, RTW_RSSI_UNKNOWN,
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phy_info->rssi);
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return;
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}
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if (sts_ent->ppdu_type != meta->ppdu_type) {
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PHL_TRACE(COMP_PHL_PSTS, _PHL_INFO_,
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"[WARNING] PPDU STS ppdu_type mis-match\n");
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UPDATE_MA_RSSI(rssi_stat, RTW_RSSI_UNKNOWN,
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phy_info->rssi);
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return;
|
}
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if (sts_ent->valid == true) {
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PHL_TRACE(COMP_PHL_PSTS, _PHL_INFO_,
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"[WARNING] PPDU STS is already updated, skip this ppdu status\n");
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return;
|
}
|
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/* update ppdu_info entry */
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sts_ent->freerun_cnt = meta->freerun_cnt;
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_os_mem_cpy(phl_com->drv_priv,
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&(sts_ent->phy_info),
|
phy_info, sizeof(struct rtw_phl_ppdu_phy_info));
|
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sts_ent->usr_num = ppdu_sts->usr_num;
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for (i = 0; i < ppdu_sts->usr_num; i++) {
|
if (ppdu_sts->usr[i].vld) {
|
sts_ent->sta[i].macid =
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ppdu_sts->usr[i].macid;
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sts_ent->sta[i].vld = 1;
|
} else {
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sts_ent->sta[i].vld = 0;
|
}
|
}
|
sts_ent->phl_done = false;
|
sts_ent->valid = true;
|
|
/* update rssi stat */
|
_os_spinlock(phl_com->drv_priv, &rssi_stat->lock, _bh, NULL);
|
switch (sts_ent->frame_type &
|
(BIT(1) | BIT(0))) {
|
case RTW_FRAME_TYPE_MGNT :
|
if (sts_ent->addr_cam_vld) {
|
UPDATE_MA_RSSI(rssi_stat,
|
(1 == meta->a1_match) ?
|
RTW_RSSI_MGNT_ACAM_A1M :
|
RTW_RSSI_MGNT_ACAM,
|
phy_info->rssi);
|
} else {
|
UPDATE_MA_RSSI(rssi_stat, RTW_RSSI_MGNT_OTHER,
|
phy_info->rssi);
|
}
|
break;
|
case RTW_FRAME_TYPE_CTRL :
|
if (sts_ent->addr_cam_vld) {
|
UPDATE_MA_RSSI(rssi_stat,
|
(1 == meta->a1_match) ?
|
RTW_RSSI_CTRL_ACAM_A1M :
|
RTW_RSSI_CTRL_ACAM,
|
phy_info->rssi);
|
} else {
|
UPDATE_MA_RSSI(rssi_stat, RTW_RSSI_CTRL_OTHER,
|
phy_info->rssi);
|
}
|
break;
|
case RTW_FRAME_TYPE_DATA :
|
if (sts_ent->addr_cam_vld) {
|
UPDATE_MA_RSSI(rssi_stat,
|
(1 == meta->a1_match) ?
|
RTW_RSSI_DATA_ACAM_A1M :
|
RTW_RSSI_DATA_ACAM,
|
phy_info->rssi);
|
} else {
|
UPDATE_MA_RSSI(rssi_stat, RTW_RSSI_DATA_OTHER,
|
phy_info->rssi);
|
}
|
break;
|
default:
|
UPDATE_MA_RSSI(rssi_stat, RTW_RSSI_UNKNOWN,
|
phy_info->rssi);
|
break;
|
}
|
_os_spinunlock(phl_com->drv_priv, &rssi_stat->lock, _bh, NULL);
|
}
|
