/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _HAL_CHAN_INFO_C_
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#include "hal_headers.h"
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#ifdef CONFIG_PHL_CHANNEL_INFO
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enum rtw_hal_status
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rtw_hal_cfg_chinfo(void *hal, struct rtw_phl_stainfo_t *sta, u8 enable)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct chinfo_bbcr_cfg bbcr = {0};
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u8 mode = 0, filter = 0, sg_size = 0;
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enum rtw_hal_status hal_status = RTW_HAL_STATUS_FAILURE;
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u8 macid = (u8)sta->macid;
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/*
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*TODO: Discuss how to config accroding to different mode.
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* Currently, macid, mode, filter, sg_size use default value,
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* which is hard code in rtw_hal_mac_chan_info_cfg.
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*/
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hal_status = rtw_hal_mac_chan_info_cfg(hal_info, enable, macid, mode, filter, sg_size);
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if (hal_status == RTW_HAL_STATUS_SUCCESS) {
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if (enable) {
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/*
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*Below is Example code for BBCR set to Legacy channel 80MHz
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*TODO 1: need to calculate channel raw data size to see if
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* it is acceptable.
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*TODO 2: there should be 10 sets of pre-defined configuration for BBCR.
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* need to decide which CR to use.
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*/
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bbcr.ch_i_phy0_en =1;
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bbcr.ch_i_phy1_en = 0;
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bbcr.ch_i_grp_num_he = 1;
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bbcr.ch_i_grp_num_non_he = 1;
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bbcr.ch_i_data_src = 0; /*LS, channel estimation*/
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bbcr.ch_i_cmprs = 0; /*8 bits*/
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bbcr.ch_i_ele_bitmap = 0x101;
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bbcr.ch_i_blk_start_idx = 1;
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bbcr.ch_i_blk_end_idx = 10;
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bbcr.ch_i_type = 0; /* legacy channel*/
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bbcr.ch_i_seg_len = 0; /*12*/
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rtw_hal_bb_chan_info_cfg(hal_info, &bbcr);
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}
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}
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return hal_status;
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}
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void
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_hal_fill_csi_header_remain(void* hal, struct csi_header_t *csi_header
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, struct rtw_r_meta_data *mdata)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct rtw_hal_com_t *h = hal_info->hal_com;
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/* from mdata */
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csi_header->hw_assigned_timestamp = mdata->freerun_cnt;
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csi_header->rx_data_rate = mdata->rx_rate;
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csi_header->bandwidth = mdata->bw;
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csi_header->ch_matrix_report = mdata->get_ch_info;
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/* TODO: from drv define, get value from other side.*/
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csi_header->channel = 0;
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csi_header->num_sub_carrier = 0;
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csi_header->num_bit_per_tone = 0;
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/* Others: mac addres not from TA ? */
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/* hal_mem_cpy(h, &(csi_header->mac_addr[0]), &(mdata->ta[0]), MAC_ALEN); */
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}
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void
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_hal_fill_csi_header_phy_info(void* hal, struct csi_header_t *csi_header
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, struct ch_rpt_hdr_info *ch_hdr_rpt, struct phy_info_rpt *phy_info)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct rtw_hal_com_t *h = hal_info->hal_com;
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/* Initialize csi header */
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hal_mem_set(h, csi_header, 0, sizeof(struct csi_header_t));
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/* from phy_info_rpt */
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hal_mem_cpy(h, &(csi_header->rssi[0]), &(phy_info->rssi[0]), 2);
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csi_header->rxsc = phy_info->rxsc;
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/* from ch_rpt_hdr_info */
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csi_header->nc = ch_hdr_rpt->n_rx;
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csi_header->nr = ch_hdr_rpt->n_sts;
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csi_header->avg_idle_noise_pwr = ch_hdr_rpt->avg_noise_pow;
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csi_header->csi_data_length = (ch_hdr_rpt->total_len_l <<16 | ch_hdr_rpt->total_len_m)
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- 16; /* header(8byte) + Phy_info_in_seg_0(8byte) */
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csi_header->csi_valid = ch_hdr_rpt->set_valid;
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hal_mem_cpy(h, &(csi_header->evm[0]), &(ch_hdr_rpt->evm[0]), 2);
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}
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#endif /* CONFIG_PHL_CHANNEL_INFO */
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