/*
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* (C) Copyright 2016
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* Vikas Manocha, <vikas.manocha@st.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SERIAL_STM32_X7_
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#define _SERIAL_STM32_X7_
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struct stm32_usart {
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u32 cr1;
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u32 cr2;
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u32 cr3;
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u32 brr;
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u32 gtpr;
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u32 rtor;
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u32 rqr;
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u32 sr;
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u32 icr;
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u32 rd_dr;
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u32 tx_dr;
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};
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/* Information about a serial port */
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struct stm32x7_serial_platdata {
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struct stm32_usart *base; /* address of registers in physical memory */
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unsigned long int clock_rate;
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};
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#define USART_CR1_OVER8 (1 << 15)
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#define USART_CR1_TE (1 << 3)
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#define USART_CR1_RE (1 << 2)
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#define USART_CR1_UE (1 << 0)
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#define USART_CR3_OVRDIS (1 << 12)
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#define USART_SR_FLAG_RXNE (1 << 5)
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#define USART_SR_FLAG_TXE (1 << 7)
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#define USART_BRR_F_MASK 0xFF
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#define USART_BRR_M_SHIFT 4
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#define USART_BRR_M_MASK 0xFFF0
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#endif
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