/*
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* Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __DRIVER_RKNAND_H__
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#define __DRIVER_RKNAND_H__
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#include <asm/io.h>
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#include <clk.h>
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#include <asm/arch/clock.h>
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/* Represents an NVM Express device. Each nvme_dev is a PCI function. */
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struct rknand_dev {
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void *ioaddr;
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struct clk nandc_clk;
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struct clk nandc_hclk;
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u32 density;
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struct udevice *dev;
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/*
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* read() - read from a block device
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*
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* @start: Start block number to read (0=first)
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* @blkcnt: Number of blocks to read
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* @buffer: Destination buffer for data read
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* @return 0 is OK, -1 is error.
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*/
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u32 (*read)(u8 lun, u32 start, u32 blkcnt, void *buffer);
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/*
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* write() - write to a block device
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*
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* @dev: Device to write to
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* @start: Start block number to write (0=first)
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* @blkcnt: Number of blocks to write
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* @buffer: Source buffer for data to write
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* @return 0 is OK, -1 is error.
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*/
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u32 (*write)(u8 lun, u32 start, u32 blkcnt, const void *buffer);
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/*
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* erase() - erase a section of a block device
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*
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* @dev: Device to (partially) erase
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* @start: Start block number to erase (0=first)
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* @blkcnt: Number of blocks to erase
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* @return 0 is OK, -1 is error.
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*/
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u32 (*erase)(u8 lun, u32 start, u32 blkcnt);
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};
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struct rknand_uclass_priv {
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struct rknand_dev *ndev;
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};
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u32 ftl_write(u8 lun, u32 start, u32 blkcnt, const void *buffer);
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u32 ftl_read(u8 lun, u32 start, u32 blkcnt, void *buffer);
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u32 ftl_discard(u8 lun, u32 start, u32 blkcnt);
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u32 ftl_get_density(u8 lun);
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int rk_ftl_init(u32 *reg_base);
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u32 ftl_vendor_read(u32 index, u32 nsec, void *buf);
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u32 ftl_vendor_write(u32 index, u32 nsec, void *buf);
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#endif /* __DRIVER_RKNAND_H__ */
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