/*
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <dm.h>
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#include "irq-internal.h"
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DECLARE_GLOBAL_DATA_PTR;
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static struct gpio_bank gpio_banks[GPIO_BANK_NUM] = {
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#if GPIO_BANK_NUM >= 1
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GPIO_BANK_REGISTER(0, GPIO_BANK_PINS),
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#endif
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#if GPIO_BANK_NUM >= 2
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GPIO_BANK_REGISTER(1, GPIO_BANK_PINS),
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#endif
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#if GPIO_BANK_NUM >= 3
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GPIO_BANK_REGISTER(2, GPIO_BANK_PINS),
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#endif
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#if GPIO_BANK_NUM >= 4
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GPIO_BANK_REGISTER(3, GPIO_BANK_PINS),
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#endif
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#if GPIO_BANK_NUM >= 5
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GPIO_BANK_REGISTER(4, GPIO_BANK_PINS),
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#endif
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#if GPIO_BANK_NUM >= 6
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GPIO_BANK_REGISTER(5, GPIO_BANK_PINS),
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#endif
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#if GPIO_BANK_NUM >= 7
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GPIO_BANK_REGISTER(6, GPIO_BANK_PINS),
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#endif
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#if GPIO_BANK_NUM >= 8
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GPIO_BANK_REGISTER(7, GPIO_BANK_PINS),
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#endif
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#if GPIO_BANK_NUM >= 9
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GPIO_BANK_REGISTER(8, GPIO_BANK_PINS),
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#endif
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#if GPIO_BANK_NUM >= 10
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GPIO_BANK_REGISTER(9, GPIO_BANK_PINS),
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#endif
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};
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static const char *aliases_gpios[GPIO_BANK_NUM];
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static const char *order_gpios[GPIO_BANK_NUM];
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static int gpio_is_valid(u32 gpio)
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{
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if ((gpio == EINVAL_GPIO) ||
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!GPIO_BANK_VALID(gpio) ||
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!GPIO_PIN_VALID(gpio)) {
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IRQ_E("gpio-%d(bank-%d, pin-%d) is invalid!\n",
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gpio, GPIO_BANK(gpio), GPIO_PIN(gpio));
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return 0;
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}
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return 1;
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}
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static int __hard_gpio_to_irq(u32 gpio)
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{
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int idx, bank = 0, pin = 0;
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int irq;
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if (!gpio_is_valid(gpio))
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return -EINVAL;
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bank = (gpio & GPIO_BANK_MASK) >> GPIO_BANK_OFFSET;
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pin = (gpio & GPIO_PIN_MASK) >> GPIO_PIN_OFFSET;
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for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
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if (gpio_banks[idx].id == bank) {
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irq = (gpio_banks[idx].irq_base + pin);
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if (irq_is_busy(irq))
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return -EBUSY;
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return irq;
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}
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}
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return -EINVAL;
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}
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static int init_order_gpios(void)
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{
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const void *fdt = gd->fdt_blob;
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static int initialized;
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int node, offset;
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int i = 0;
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if (initialized)
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return 0;
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node = fdt_path_offset(fdt, "/pinctrl");
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if (node < 0)
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return -EINVAL;
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for (offset = fdt_first_subnode(fdt, node);
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offset >= 0 && i < GPIO_BANK_NUM;
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offset = fdt_next_subnode(fdt, offset)) {
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if (i >= GPIO_BANK_NUM)
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break;
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order_gpios[i++] = fdt_get_name(fdt, offset, NULL);
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IRQ_D("order gpio: %s\n", order_gpios[i - 1]);
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}
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initialized = 1;
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return 0;
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}
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static int init_aliases_gpios(void)
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{
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static int initialized;
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char alias_name[6];
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int i;
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if (initialized)
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return 0;
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for (i = 0; i < GPIO_BANK_NUM; i++) {
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snprintf(alias_name, 6, "gpio%d", i);
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aliases_gpios[i] = fdt_get_alias(gd->fdt_blob, alias_name);
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if (!aliases_gpios[i])
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return -EINVAL;
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IRQ_D("aliases gpio: %s\n", aliases_gpios[i]);
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}
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initialized = 1;
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return 0;
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}
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static int lookup_gpio_bank(const char *name)
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{
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int bank, ret;
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for (bank = 0; bank < GPIO_BANK_NUM; bank++) {
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if (strstr(name, gpio_banks[bank].name))
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return bank;
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}
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ret = init_aliases_gpios();
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for (bank = 0; !ret && bank < GPIO_BANK_NUM; bank++) {
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/*
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* @name pattern can be:
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* /pinctrl/gpio@fd8a0000 or gpio@fd8a0000
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*/
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if (strstr(aliases_gpios[bank], name))
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return bank;
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}
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ret = init_order_gpios();
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for (bank = 0; !ret && bank < GPIO_BANK_NUM; bank++) {
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if (!strcmp(name, order_gpios[bank]))
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return bank;
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}
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return -ENOENT;
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}
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static int __phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
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{
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const void *blob = gd->fdt_blob;
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const char *gpio_name;
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int irq, node;
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int bank;
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node = fdt_node_offset_by_phandle(blob, gpio_phandle);
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if (node < 0) {
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IRQ_E("No gpio node by phandle(0x%x), ret=%d\n", gpio_phandle, node);
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return EINVAL_GPIO;
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}
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gpio_name = fdt_get_name(blob, node, NULL);
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if (!gpio_name)
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return EINVAL_GPIO;
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bank = lookup_gpio_bank(gpio_name);
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if (bank < 0) {
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IRQ_E("IRQ Framework can't find: %s\n", gpio_name);
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return EINVAL_GPIO;
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}
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IRQ_D("%s: gpio%d-%d\n", __func__, bank, offset);
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irq = RK_IRQ_GPIO(bank, offset);
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if (!gpio_is_valid(irq))
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return EINVAL_GPIO;
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return __hard_gpio_to_irq(irq);
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}
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static int __irq_to_gpio(int irq)
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{
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int bank, pin, idx;
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bank = (irq - PIN_BASE) / GPIO_BANK_PINS;
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pin = (irq - PIN_BASE) % GPIO_BANK_PINS;
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for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
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if (gpio_banks[idx].id == bank) {
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return (bank << GPIO_BANK_OFFSET) |
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(pin << GPIO_PIN_OFFSET);
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}
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}
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return -EINVAL;
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}
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int gpio_to_irq(struct gpio_desc *gpio)
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{
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int irq_gpio, bank, ret = EINVAL_GPIO;
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char *name, *name_tok;
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bool found;
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if (!gpio->dev->name) {
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IRQ_E("Can't find dev name for gpio bank\n");
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return EINVAL_GPIO;
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}
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name_tok = strdup(gpio->dev->name);
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if (!name_tok) {
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IRQ_E("Strdup '%s' failed!\n", gpio->dev->name);
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return -ENOMEM;
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}
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name = strtok(name_tok, "@");
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if (!name) {
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IRQ_E("Can't strtok '@' for '%s'\n", name_tok);
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goto out;
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}
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for (bank = 0; bank < ARRAY_SIZE(gpio_banks); bank++) {
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if (!strcmp(gpio_banks[bank].name, name)) {
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found = true;
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break;
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}
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}
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if (!found) {
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IRQ_E("GPIO irq framework can't find '%s'\n", name);
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goto out;
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}
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irq_gpio = RK_IRQ_GPIO(bank, gpio->offset);
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if (!gpio_is_valid(irq_gpio))
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goto out;
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free(name_tok);
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return __hard_gpio_to_irq(irq_gpio);
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out:
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free(name_tok);
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return ret;
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}
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int hard_gpio_to_irq(u32 gpio)
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{
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if (!gpio_is_valid(gpio))
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return EINVAL_GPIO;
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return __hard_gpio_to_irq(gpio);
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}
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int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin)
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{
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if (gpio_phandle < 0)
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return EINVAL_GPIO;
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return __phandle_gpio_to_irq(gpio_phandle, pin);
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}
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int irq_to_gpio(int irq)
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{
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return __irq_to_gpio(irq);
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}
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struct gpio_bank *gpio_id_to_bank(u32 id)
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{
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int idx;
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for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
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if (gpio_banks[idx].id == id)
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return &gpio_banks[idx];
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}
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return NULL;
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}
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struct gpio_bank *gpio_to_bank(u32 gpio)
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{
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int id;
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if (!gpio_is_valid(gpio))
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return NULL;
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id = (gpio & GPIO_BANK_MASK) >> GPIO_BANK_OFFSET;
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return gpio_id_to_bank(id);
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}
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