/*
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/io.h>
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#include <asm/u-boot-arm.h>
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#include <dm.h>
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#include <irq-generic.h>
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#include "irq-internal.h"
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DECLARE_GLOBAL_DATA_PTR;
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struct irq_desc {
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interrupt_handler_t *handle_irq;
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void *data;
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u32 flag;
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u32 count;
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};
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struct irqchip_desc {
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struct irq_chip *gic;
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struct irq_chip *gpio;
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struct irq_chip *virq;
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int suspend_irq[PLATFORM_SUSPEND_MAX_IRQ];
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int suspend_num;
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};
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static struct irq_desc irq_desc[PLATFORM_MAX_IRQ];
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static struct irqchip_desc irqchip;
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static bool intr_setup;
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int bad_irq(int irq)
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{
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if (!intr_setup) {
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IRQ_W("Interrupt framework is not setup\n");
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return -EINVAL;
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}
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if (irq < PLATFORM_MAX_IRQ) {
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if (!irq_desc[irq].handle_irq)
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return -EINVAL;
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} else {
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if (bad_virq(irq)) {
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IRQ_E("Unknown virq: %d\n", irq);
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return -EINVAL;
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}
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}
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return 0;
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}
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/* general interrupt handler for gpio chip */
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void __generic_gpio_handle_irq(int irq)
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{
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if (bad_irq(irq))
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return;
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if (irq < PLATFORM_GIC_MAX_IRQ) {
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IRQ_W("IRQ %d: Invalid GPIO irq\n", irq);
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return;
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}
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if (irq_desc[irq].handle_irq) {
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irq_desc[irq].count++;
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irq_desc[irq].handle_irq(irq, irq_desc[irq].data);
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}
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}
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void __do_generic_irq_handler(void)
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{
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u32 irq;
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assert(irqchip.gic->irq_get);
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assert(irqchip.gic->irq_eoi);
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irq = irqchip.gic->irq_get();
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if (irq < PLATFORM_GIC_MAX_IRQ) {
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if (irq_desc[irq].handle_irq) {
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irq_desc[irq].count++;
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irq_desc[irq].handle_irq(irq, irq_desc[irq].data);
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}
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}
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irqchip.gic->irq_eoi(irq);
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}
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int irq_is_busy(int irq)
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{
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return (irq >= 0 && irq_desc[irq].handle_irq) ? -EBUSY : 0;
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}
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static int bad_irq_chip(struct irq_chip *chip)
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{
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return (!chip->name || !chip->irq_init || !chip->irq_enable ||
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!chip->irq_disable) ? -EINVAL : 0;
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}
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static int __do_arch_irq_init(void)
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{
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int ret = -EINVAL;
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/* After relocation done, bss data intr_setup */
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if (!(gd->flags & GD_FLG_RELOC)) {
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IRQ_W("Interrupt framework should initialize after reloc\n");
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return -EINVAL;
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}
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/*
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* We set true before arch_gpio_irq_init() to avoid fail when
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* request irq for gpio banks.
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*/
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intr_setup = true;
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memset(irq_desc, 0, sizeof(irq_desc));
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irqchip.gic = arch_gic_get_irqchip();
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if (bad_irq_chip(irqchip.gic)) {
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IRQ_E("Bad gic irqchip\n");
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goto out;
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}
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irqchip.gpio = arch_gpio_get_irqchip();
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if (bad_irq_chip(irqchip.gpio)) {
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IRQ_E("Bad gpio irqchip\n");
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goto out;
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}
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irqchip.virq = arch_virq_get_irqchip();
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if (bad_irq_chip(irqchip.virq)) {
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IRQ_E("Bad virq irqchip\n");
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goto out;
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}
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ret = irqchip.gic->irq_init();
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if (ret) {
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IRQ_E("GIC Interrupt setup failed, ret=%d\n", ret);
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goto out;
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}
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ret = irqchip.gpio->irq_init();
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if (ret) {
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IRQ_E("GPIO Interrupt setup failed, ret=%d\n", ret);
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goto out;
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}
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ret = irqchip.virq->irq_init();
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if (ret) {
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IRQ_E("VIRQ Interrupt setup failed, ret=%d\n", ret);
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goto out;
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}
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return 0;
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out:
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intr_setup = false;
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return ret;
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}
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int irq_handler_enable(int irq)
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{
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int ret;
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if (bad_irq(irq))
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return -EINVAL;
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if (irq < PLATFORM_GIC_MAX_IRQ)
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ret = irqchip.gic->irq_enable(irq);
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else if (irq < PLATFORM_GPIO_MAX_IRQ)
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ret = irqchip.gpio->irq_enable(irq);
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else
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ret = irqchip.virq->irq_enable(irq);
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if (!ret && irq < PLATFORM_MAX_IRQ)
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irq_desc[irq].flag |= IRQ_FLG_ENABLE;
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return ret;
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}
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int irq_handler_disable(int irq)
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{
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int ret;
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if (bad_irq(irq))
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return -EINVAL;
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if (irq < PLATFORM_GIC_MAX_IRQ)
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ret = irqchip.gic->irq_disable(irq);
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else if (irq < PLATFORM_GPIO_MAX_IRQ)
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ret = irqchip.gpio->irq_disable(irq);
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else
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ret = irqchip.virq->irq_disable(irq);
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if (!ret && irq < PLATFORM_MAX_IRQ)
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irq_desc[irq].flag &= ~IRQ_FLG_ENABLE;
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return ret;
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}
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int irq_set_irq_type(int irq, unsigned int type)
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{
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if (bad_irq(irq))
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return -EINVAL;
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if (irq < PLATFORM_GIC_MAX_IRQ)
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return irqchip.gic->irq_set_type(irq, type);
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else if (irq < PLATFORM_GPIO_MAX_IRQ)
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return irqchip.gpio->irq_set_type(irq, type);
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else
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return -ENOSYS;
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}
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int irq_revert_irq_type(int irq)
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{
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if (bad_irq(irq))
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return -EINVAL;
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if (irq < PLATFORM_GIC_MAX_IRQ)
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return 0;
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else if (irq < PLATFORM_GPIO_MAX_IRQ)
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return irqchip.gpio->irq_revert_type(irq);
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else
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return -ENOSYS;
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}
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int irq_get_gpio_level(int irq)
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{
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if (bad_irq(irq))
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return -EINVAL;
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if (irq < PLATFORM_GIC_MAX_IRQ)
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return 0;
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else if (irq < PLATFORM_GPIO_MAX_IRQ)
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return irqchip.gpio->irq_get_gpio_level(irq);
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else
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return -ENOSYS;
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}
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void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
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{
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if (!intr_setup) {
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IRQ_W("Interrupt framework is not intr_setup\n");
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return;
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}
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if (irq < PLATFORM_MAX_IRQ) {
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if (!handler || irq_desc[irq].handle_irq)
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return;
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irq_desc[irq].handle_irq = handler;
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irq_desc[irq].data = data;
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} else {
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virq_install_handler(irq, handler, data);
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}
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}
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void irq_free_handler(int irq)
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{
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if (irq_handler_disable(irq))
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return;
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if (irq < PLATFORM_MAX_IRQ) {
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irq_desc[irq].handle_irq = NULL;
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irq_desc[irq].data = NULL;
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} else {
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virq_free_handler(irq);
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}
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}
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int irq_handler_enable_suspend_only(int irq)
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{
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if (bad_irq(irq))
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return -EINVAL;
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if (irqchip.suspend_num >= PLATFORM_SUSPEND_MAX_IRQ) {
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printf("Over max count(%d) of suspend irq\n",
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PLATFORM_SUSPEND_MAX_IRQ);
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return -EPERM;
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}
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irqchip.suspend_irq[irqchip.suspend_num++] = irq;
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return 0;
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}
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int irqs_suspend(void)
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{
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int i;
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for (i = 0; i < irqchip.suspend_num; i++)
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irq_handler_enable(irqchip.suspend_irq[i]);
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return irqchip.gic->irq_suspend();
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}
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int irqs_resume(void)
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{
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int i;
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for (i = 0; i < irqchip.suspend_num; i++)
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irq_handler_disable(irqchip.suspend_irq[i]);
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return irqchip.gic->irq_resume();
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}
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#ifdef CONFIG_ARM64
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void do_irq(struct pt_regs *pt_regs, unsigned int esr)
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{
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#ifdef CONFIG_ROCKCHIP_DEBUGGER
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printf("\n>>> Rockchip Debugger:\n");
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show_regs(pt_regs);
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#endif
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__do_generic_irq_handler();
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}
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#else
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void do_irq(struct pt_regs *pt_regs)
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{
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#ifdef CONFIG_ROCKCHIP_DEBUGGER
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printf("\n>>> Rockchp Debugger:\n");
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show_regs(pt_regs);
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#endif
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__do_generic_irq_handler();
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}
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#endif
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int arch_interrupt_init(void)
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{
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#ifndef CONFIG_ARM64
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unsigned long cpsr __maybe_unused;
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/* stack has been reserved in: arch_reserve_stacks() */
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IRQ_STACK_START = gd->irq_sp;
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IRQ_STACK_START_IN = gd->irq_sp;
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__asm__ __volatile__("mrs %0, cpsr\n"
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: "=r" (cpsr)
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:
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: "memory");
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__asm__ __volatile__("msr cpsr_c, %0\n"
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"mov sp, %1\n"
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:
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: "r" (IRQ_MODE | I_BIT |
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F_BIT | (cpsr & ~FIQ_MODE)),
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"r" (IRQ_STACK_START)
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: "memory");
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__asm__ __volatile__("msr cpsr_c, %0"
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:
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: "r" (cpsr)
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: "memory");
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#endif
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return __do_arch_irq_init();
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}
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int interrupt_init(void)
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{
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return arch_interrupt_init();
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}
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void enable_interrupts(void)
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{
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local_irq_enable();
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}
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int disable_interrupts(void)
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{
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int flags;
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local_irq_save(flags);
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return flags;
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}
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static int do_dump_irqs(cmd_tbl_t *cmdtp, int flag,
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int argc, char * const argv[])
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{
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struct udevice *dev;
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char *drv_name;
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int pirq;
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printf(" IRQ En Handler Driver Name Trig\n");
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printf("----------------------------------------------------------------------\n");
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for (pirq = 0; pirq < PLATFORM_MAX_IRQ; pirq++) {
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if (!irq_desc[pirq].handle_irq)
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continue;
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dev = (struct udevice *)irq_desc[pirq].data;
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if (strstr(dev->name, "gpio"))
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drv_name = "IRQ";
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else
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drv_name = dev->driver->name;
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printf(" %3d %d 0x%08lx %-12s %-12s %d\n",
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pirq, irq_desc[pirq].flag & IRQ_FLG_ENABLE ? 1 : 0,
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(ulong)irq_desc[pirq].handle_irq,
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drv_name, dev->name, irq_desc[pirq].count);
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virqs_show(pirq);
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}
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return 0;
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}
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U_BOOT_CMD(
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dump_irqs, 1, 1, do_dump_irqs, "Dump IRQs", ""
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);
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