#ifndef __SDIOHAL_H__
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#define __SDIOHAL_H__
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/scatterlist.h>
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#include <linux/slab.h>
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#ifndef timespec
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#define timespec timespec64
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#define timespec_to_ns timespec64_to_ns
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#define getnstimeofday ktime_get_real_ts64
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#define timeval __kernel_old_timeval
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#define rtc_time_to_tm rtc_time64_to_tm
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#define timeval_to_ns ktime_to_ns
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#endif
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#include <linux/version.h>
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#if KERNEL_VERSION(4, 11, 0) <= LINUX_VERSION_CODE
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#include <uapi/linux/sched/types.h>
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#else
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#include <linux/sched.h>
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#endif
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#include <wcn_bus.h>
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#ifdef CONFIG_WCN_SLP
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#include "../sleep/sdio_int.h"
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#include "../sleep/slp_mgr.h"
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#endif
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#define PERFORMANCE_COUNT 100
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#define SDIOHAL_PRINTF_LEN (16)
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#define SDIOHAL_NORMAL_LEVEL (0x01)
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#define SDIOHAL_DEBUG_LEVEL (0x02)
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#define SDIOHAL_LIST_LEVEL (0x04)
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#define SDIOHAL_DATA_LEVEL (0x08)
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#define SDIOHAL_PERF_LEVEL (0x10)
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#define sdiohal_info(fmt, args...) \
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pr_info("sdiohal:" fmt, ## args)
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#define sdiohal_err(fmt, args...) \
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pr_err("sdiohal err:" fmt, ## args)
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#ifdef CONFIG_DEBUG_FS
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extern long int sdiohal_log_level;
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#define sdiohal_normal(fmt, args...) \
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do { if (sdiohal_log_level & SDIOHAL_NORMAL_LEVEL) \
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sdiohal_info(fmt, ## args); \
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} while (0)
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#define sdiohal_debug(fmt, args...) \
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do { if (sdiohal_log_level & SDIOHAL_DEBUG_LEVEL) \
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sdiohal_info(fmt, ## args); \
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} while (0)
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#define sdiohal_pr_list(loglevel, fmt, args...) \
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do { if (sdiohal_log_level & loglevel) \
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sdiohal_info(fmt, ## args); \
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} while (0)
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#define sdiohal_pr_data(level, prefix_str, prefix_type, \
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rowsize, groupsize, buf, len, ascii, loglevel) \
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do { if (sdiohal_log_level & loglevel) \
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print_hex_dump(level, prefix_str, prefix_type, \
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rowsize, groupsize, buf, len, ascii); \
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} while (0)
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#define sdiohal_pr_perf(fmt, args...) \
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do { if (sdiohal_log_level & SDIOHAL_PERF_LEVEL) \
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trace_printk(fmt, ## args); \
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} while (0)
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#else
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#define sdiohal_normal(fmt, args...)
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#define sdiohal_debug(fmt, args...)
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#define sdiohal_pr_list(loglevel, fmt, args...)
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#define sdiohal_pr_data(level, prefix_str, prefix_type, \
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rowsize, groupsize, buf, len, ascii, loglevel)
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#define sdiohal_pr_perf(fmt, args...)
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#endif
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#define SDIOHAL_SDMA 0
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#define SDIOHAL_ADMA 1
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#define SDIOHAL_RX_EXTERNAL_IRQ 0
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#define SDIOHAL_RX_INBAND_IRQ 1
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#define SDIOHAL_RX_POLLING 2
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#ifdef CONFIG_UWE5623
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#define SDIO_RESET_ENABLE 0x40930040
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#endif
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/* channel numbers */
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#define SDIO_CHN_TX_NUM 12
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#define SDIO_CHN_RX_NUM 14
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#define SDIO_CHANNEL_NUM (SDIO_CHN_TX_NUM + SDIO_CHN_RX_NUM)
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/* dump designated channel data when assert happened */
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#define SDIO_DUMP_CHANNEL_DATA 1
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#define SDIO_DUMP_TX_CHANNEL_NUM 8
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#define SDIO_DUMP_RX_CHANNEL_NUM 22
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#define SDIO_DUMP_RX_WIFI_EVENT_MIN (0x80)
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/* list bumber */
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#define SDIO_TX_LIST_NUM SDIO_CHN_TX_NUM
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#define SDIO_RX_LIST_NUM SDIO_CHN_RX_NUM
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#define MAX_CHAIN_NODE_NUM 100
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/* task prio */
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#define SDIO_TX_TASK_PRIO 89
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#define SDIO_RX_TASK_PRIO 90
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/* mbuf max size */
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#define MAX_MBUF_SIZE (2 << 10)
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#ifdef CONFIG_SDIO_BLKSIZE_512
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/* cp blk size */
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#define SDIOHAL_BLK_SIZE 512
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/* each pac data max size,cp align size */
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#define MAX_PAC_SIZE (SDIOHAL_BLK_SIZE * 4)
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#elif defined(CONFIG_WCN_PARSE_DTS)
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/* cp blk size */
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#define SDIOHAL_BLK_SIZE (sprdwcn_bus_get_blk_size())
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/* each pac data max size,cp align size */
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#define MAX_PAC_SIZE ((SDIOHAL_BLK_SIZE == 512) ? \
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(SDIOHAL_BLK_SIZE * 4) : (SDIOHAL_BLK_SIZE * 2))
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#else
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/* cp blk size */
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#define SDIOHAL_BLK_SIZE 840
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/* each pac data max size,cp align size */
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#define MAX_PAC_SIZE (SDIOHAL_BLK_SIZE * 2)
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#endif
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/* pub header size */
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#define SDIO_PUB_HEADER_SIZE (4)
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#define SDIOHAL_DTBS_BUF_SIZE SDIOHAL_BLK_SIZE
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/* for rx buf */
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#define SDIOHAL_RX_NODE_NUM (12 << 10)
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/* for 64 bit sys */
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#define SDIOHAL_RX_RECVBUF_LEN (MAX_CHAIN_NODE_NUM * MAX_MBUF_SIZE)
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#define SDIOHAL_FRAG_PAGE_MAX_ORDER \
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get_order(SDIOHAL_RX_RECVBUF_LEN)
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/* for 32 bit sys */
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#define SDIOHAL_32_BIT_RX_RECVBUF_LEN (16 << 10)
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#define SDIOHAL_FRAG_PAGE_MAX_ORDER_32_BIT \
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get_order(SDIOHAL_32_BIT_RX_RECVBUF_LEN)
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#define SDIOHAL_FRAG_PAGE_MAX_SIZE \
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(PAGE_SIZE << SDIOHAL_FRAG_PAGE_MAX_ORDER)
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#define SDIOHAL_PAGECNT_MAX_BIAS SDIOHAL_FRAG_PAGE_MAX_SIZE
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/* tx buf size for normal dma mode */
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#define SDIOHAL_TX_SENDBUF_LEN (MAX_CHAIN_NODE_NUM * MAX_MBUF_SIZE)
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/* temp for marlin2 */
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#define WIFI_MIN_RX 8
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#define WIFI_MAX_RX 9
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/* for adma */
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#define SDIOHAL_READ 0 /* Read request */
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#define SDIOHAL_WRITE 1 /* Write request */
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#define SDIOHAL_DATA_FIX 0 /* Fixed addressing */
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#define SDIOHAL_DATA_INC 1 /* Incremental addressing */
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#define MAX_IO_RW_BLK 511
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/* fun num */
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#define FUNC_0 0
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#define FUNC_1 1
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#define SDIOHAL_MAX_FUNCS 2
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/* cp sdio reg addr */
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#define SDIOHAL_DT_MODE_ADDR 0x0f
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#define SDIOHAL_PK_MODE_ADDR 0x20
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#define SDIOHAL_CCCR_ABORT 0x06
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#define VAL_ABORT_TRANS 0x01
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#define SDIOHAL_FBR_SYSADDR0 0x15c
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#define SDIOHAL_FBR_SYSADDR1 0x15d
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#define SDIOHAL_FBR_SYSADDR2 0x15e
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#define SDIOHAL_FBR_SYSADDR3 0x15f
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#define SDIOHAL_FBR_APBRW0 0x180
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#define SDIOHAL_FBR_APBRW1 0x181
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#define SDIOHAL_FBR_APBRW2 0x182
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#define SDIOHAL_FBR_APBRW3 0x183
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#define SDIOHAL_FBR_STBBA0 0x1bc
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#define SDIOHAL_FBR_STBBA1 0x1bd
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#define SDIOHAL_FBR_STBBA2 0x1be
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#define SDIOHAL_FBR_STBBA3 0x1bf
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#define SDIOHAL_FBR_DEINT_EN 0x1ca
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#define VAL_DEINT_ENABLE 0x3
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#define SDIOHAL_FBR_PUBINT_RAW4 0x1e8
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#define SDIOHAL_ALIGN_4BYTE(a) (((a)+3)&(~3))
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#ifdef CONFIG_SDIO_BLKSIZE_512
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#define SDIOHAL_ALIGN_BLK(a) (((a)+511)&(~511))
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#elif defined(CONFIG_WCN_PARSE_DTS)
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#define SDIOHAL_ALIGN_BLK(a) ((SDIOHAL_BLK_SIZE == 512) ? \
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(((a)+511)&(~511)) : (((a)%SDIOHAL_BLK_SIZE) ? \
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(((a)/SDIOHAL_BLK_SIZE + 1)*SDIOHAL_BLK_SIZE) : (a)))
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#else
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#define SDIOHAL_ALIGN_BLK(a) (((a)%SDIOHAL_BLK_SIZE) ? \
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(((a)/SDIOHAL_BLK_SIZE + 1)*SDIOHAL_BLK_SIZE) : (a))
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#endif
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#define WCN_128BIT_CTL_BASE 0x1a0
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#define WCN_128BIT_STAT_BASE 0x140
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#define CP_128BIT_SIZE (0x0f)
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#define WCN_CTL_REG_0 (WCN_128BIT_CTL_BASE + 0X00)
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#define WCN_CTL_REG_1 (WCN_128BIT_CTL_BASE + 0X01)
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#define WCN_CTL_REG_2 (WCN_128BIT_CTL_BASE + 0X02)
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#define WCN_CTL_REG_3 (WCN_128BIT_CTL_BASE + 0X03)
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#define WCN_CTL_REG_4 (WCN_128BIT_CTL_BASE + 0X04)
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#define WCN_CTL_REG_5 (WCN_128BIT_CTL_BASE + 0X05)
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#define WCN_CTL_REG_6 (WCN_128BIT_CTL_BASE + 0X06)
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#define WCN_CTL_REG_7 (WCN_128BIT_CTL_BASE + 0X07)
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#define WCN_CTL_REG_8 (WCN_128BIT_CTL_BASE + 0X08)
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#define WCN_CTL_REG_9 (WCN_128BIT_CTL_BASE + 0X09)
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#define WCN_CTL_REG_10 (WCN_128BIT_CTL_BASE + 0X0a)
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#define WCN_CTL_REG_11 (WCN_128BIT_CTL_BASE + 0X0b)
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#define WCN_CTL_REG_12 (WCN_128BIT_CTL_BASE + 0X0c)
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#define WCN_CTL_REG_13 (WCN_128BIT_CTL_BASE + 0X0d)
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#define WCN_CTL_REG_14 (WCN_128BIT_CTL_BASE + 0X0e)
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#define WCN_CTL_REG_15 (WCN_128BIT_CTL_BASE + 0X0f)
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#define WCN_STATE_REG_0 (WCN_128BIT_STAT_BASE + 0X00)
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#define WCN_STATE_REG_1 (WCN_128BIT_STAT_BASE + 0X01)
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#define WCN_STATE_REG_2 (WCN_128BIT_STAT_BASE + 0X02)
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#define WCN_STATE_REG_3 (WCN_128BIT_STAT_BASE + 0X03)
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#define WCN_STATE_REG_4 (WCN_128BIT_STAT_BASE + 0X04)
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#define WCN_STATE_REG_5 (WCN_128BIT_STAT_BASE + 0X05)
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#define WCN_STATE_REG_6 (WCN_128BIT_STAT_BASE + 0X06)
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#define WCN_STATE_REG_7 (WCN_128BIT_STAT_BASE + 0X07)
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#define WCN_STATE_REG_8 (WCN_128BIT_STAT_BASE + 0X08)
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#define WCN_STATE_REG_9 (WCN_128BIT_STAT_BASE + 0X09)
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#define WCN_STATE_REG_10 (WCN_128BIT_STAT_BASE + 0X0a)
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#define WCN_STATE_REG_11 (WCN_128BIT_STAT_BASE + 0X0b)
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#define WCN_STATE_REG_12 (WCN_128BIT_STAT_BASE + 0X0c)
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#define WCN_STATE_REG_13 (WCN_128BIT_STAT_BASE + 0X0d)
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#define WCN_STATE_REG_14 (WCN_128BIT_STAT_BASE + 0X0e)
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#define WCN_STATE_REG_15 (WCN_128BIT_STAT_BASE + 0X0f)
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#define SDIO_VER_CCCR (0X0)
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#define SDIO_CP_INT_EN (DUMP_SDIO_ADDR + 0x58)
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/* for marlin3 */
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#define CP_PMU_STATUS (WCN_STATE_REG_0)
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#define CP_SWITCH_SGINAL (WCN_CTL_REG_4)
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#define CP_RESET_SLAVE (WCN_CTL_REG_8)
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#define CP_BUS_HREADY (WCN_STATE_REG_4)
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#define CP_HREADY_SIZE (0x04)
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/* for malrin3e */
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#define WCN_CTL_EN BIT(7)
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#define WCN_SYS_MASK (0xf)
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#define WCN_MODE_MASK (0x3 << 4)
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#define WCN_DEBUG_CTL_REG (WCN_CTL_REG_2)
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#define WCN_DEBUG_MODE_SYS_REG (WCN_CTL_REG_1)
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#define WCN_SEL_SIG_REG (WCN_CTL_REG_0)
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#define WCN_SIG_STATE (WCN_STATE_REG_0)
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#define SDIOHAL_REMOVE_CARD_VAL 0x8000
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#define WCN_CARD_EXIST(xmit) \
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(atomic_read(xmit) < SDIOHAL_REMOVE_CARD_VAL)
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struct sdiohal_frag_mg {
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struct page_frag frag;
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unsigned int pagecnt_bias;
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};
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struct sdiohal_list_t {
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struct list_head head;
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struct mbuf_t *mbuf_head;
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struct mbuf_t *mbuf_tail;
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unsigned int type;
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unsigned int subtype;
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unsigned int node_num;
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};
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struct buf_pool_t {
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int size;
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int free;
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int payload;
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void *head;
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char *mem;
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spinlock_t lock;
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};
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struct sdiohal_sendbuf_t {
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unsigned int used_len;
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unsigned char *buf;
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unsigned int retry_len;
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unsigned char *retry_buf;
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};
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struct sdiohal_data_bak_t {
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unsigned int time;
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unsigned char data_bk[SDIOHAL_PRINTF_LEN];
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};
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struct sdiohal_data_t {
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struct task_struct *tx_thread;
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struct task_struct *rx_thread;
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struct completion tx_completed;
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struct completion rx_completed;
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/*wakeup_source pointer*/
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struct wakeup_source *tx_ws;
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struct wakeup_source *rx_ws;
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atomic_t tx_wake_flag;
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atomic_t rx_wake_flag;
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#ifdef CONFIG_WCN_SLP
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atomic_t tx_wake_cp_count[SUBSYS_MAX];
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atomic_t rx_wake_cp_count[SUBSYS_MAX];
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#endif
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struct mutex xmit_lock;
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struct mutex xmit_sdma;
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spinlock_t tx_spinlock;
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spinlock_t rx_spinlock;
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atomic_t flag_resume;
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atomic_t tx_mbuf_num;
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atomic_t xmit_cnt;
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atomic_t xmit_start;
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bool exit_flag;
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/* adma enable:1, disable:0 */
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bool adma_tx_enable;
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bool adma_rx_enable;
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bool pwrseq;
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/* blk_size: 0 840, 1 512 */
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bool blk_size;
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/* dt mode read or write fail flag */
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bool dt_rw_fail;
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/* EXTERNAL_IRQ 0, INBAND_IRQ 1, POLLING 2. */
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unsigned char irq_type;
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/* tx data list for send */
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struct sdiohal_list_t tx_list_head;
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/* tx data list for pop */
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struct sdiohal_list_t *list_tx[SDIO_CHN_TX_NUM];
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/* rx data list for dispatch */
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struct sdiohal_list_t *list_rx[SDIO_CHN_RX_NUM];
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/* mbuf list */
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struct sdiohal_list_t list_rx_buf;
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/* frag data buf */
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struct sdiohal_frag_mg frag_ctl;
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struct mchn_ops_t *ops[SDIO_CHANNEL_NUM];
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struct mutex callback_lock[SDIO_CHANNEL_NUM];
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struct buf_pool_t pool[SDIO_CHANNEL_NUM];
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bool flag_init;
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atomic_t flag_suspending;
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int gpio_num;
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unsigned int irq_num;
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unsigned int irq_trigger_type;
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atomic_t irq_cnt;
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unsigned int card_dump_flag;
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struct sdio_func *sdio_func[SDIOHAL_MAX_FUNCS];
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struct mmc_host *sdio_dev_host;
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struct scatterlist sg_list[MAX_CHAIN_NODE_NUM + 1];
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unsigned int success_pac_num;
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struct sdiohal_sendbuf_t send_buf;
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unsigned char *eof_buf;
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unsigned int dtbs;
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unsigned int remain_pac_num;
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unsigned long long rx_packer_cnt;
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char *dtbs_buf;
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/* for performance statics */
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struct timespec tm_begin_sch;
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struct timespec tm_end_sch;
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struct timespec tm_begin_irq;
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struct timespec tm_end_irq;
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/*wakeup_source pointer*/
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struct wakeup_source *scan_ws;
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struct completion scan_done;
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struct completion remove_done;
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unsigned int sdio_int_reg;
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#if SDIO_DUMP_CHANNEL_DATA
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struct sdiohal_data_bak_t chntx_push_old;
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struct sdiohal_data_bak_t chntx_push_new;
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struct sdiohal_data_bak_t chntx_denq_old;
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struct sdiohal_data_bak_t chntx_denq_new;
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struct sdiohal_data_bak_t chnrx_dispatch_old;
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struct sdiohal_data_bak_t chnrx_dispatch_new;
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#endif
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int printlog_txchn;
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int printlog_rxchn;
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};
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struct sdiohal_data_t *sdiohal_get_data(void);
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unsigned char sdiohal_get_tx_mode(void);
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unsigned char sdiohal_get_rx_mode(void);
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unsigned char sdiohal_get_irq_type(void);
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unsigned int sdiohal_get_blk_size(void);
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/* for list manger */
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void sdiohal_atomic_add(int count, atomic_t *value);
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void sdiohal_atomic_sub(int count, atomic_t *value);
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/* seam for thread */
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void sdiohal_tx_down(void);
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void sdiohal_tx_up(void);
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void sdiohal_rx_down(void);
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void sdiohal_rx_up(void);
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int sdiohal_tx_thread(void *data);
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int sdiohal_rx_thread(void *data);
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/* for wakup event */
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void sdiohal_lock_tx_ws(void);
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void sdiohal_unlock_tx_ws(void);
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void sdiohal_lock_rx_ws(void);
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void sdiohal_unlock_rx_ws(void);
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void sdiohal_lock_scan_ws(void);
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void sdiohal_unlock_scan_ws(void);
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/* for api mutex */
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void sdiohal_callback_lock(struct mutex *mutex);
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void sdiohal_callback_unlock(struct mutex *mutex);
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/* for sleep */
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#ifdef CONFIG_WCN_SLP
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void sdiohal_cp_tx_sleep(enum slp_subsys subsys);
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void sdiohal_cp_tx_wakeup(enum slp_subsys subsys);
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void sdiohal_cp_rx_sleep(enum slp_subsys subsys);
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void sdiohal_cp_rx_wakeup(enum slp_subsys subsys);
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#else
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#define sdiohal_cp_tx_sleep(args...) do {} while (0)
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#define sdiohal_cp_tx_wakeup(args...) do {} while (0)
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#define sdiohal_cp_rx_sleep(args...) do {} while (0)
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#define sdiohal_cp_rx_wakeup(args...) do {} while (0)
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#endif
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void sdiohal_resume_check(void);
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void sdiohal_resume_wait(void);
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void sdiohal_op_enter(void);
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void sdiohal_op_leave(void);
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void sdiohal_sdma_enter(void);
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void sdiohal_sdma_leave(void);
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void sdiohal_channel_to_hwtype(int inout, int chn,
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unsigned int *type, unsigned int *subtype);
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int sdiohal_hwtype_to_channel(int inout, unsigned int type,
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unsigned int subtype);
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/* for list manger */
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bool sdiohal_is_tx_list_empty(void);
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int sdiohal_tx_packer(struct sdiohal_sendbuf_t *send_buf,
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struct sdiohal_list_t *data_list,
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struct mbuf_t *mbuf_node);
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int sdiohal_tx_set_eof(struct sdiohal_sendbuf_t *send_buf,
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unsigned char *eof_buf);
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void sdiohal_tx_list_enq(int channel, struct mbuf_t *head,
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struct mbuf_t *tail, int num);
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void sdiohal_tx_find_data_list(struct sdiohal_list_t *data_list);
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int sdiohal_tx_list_denq(struct sdiohal_list_t *data_list);
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int sdiohal_rx_list_free(struct mbuf_t *mbuf_head,
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struct mbuf_t *mbuf_tail, int num);
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struct sdiohal_list_t *sdiohal_get_rx_mbuf_list(int num);
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struct sdiohal_list_t *sdiohal_get_rx_mbuf_node(int num);
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int sdiohal_rx_list_dispatch(void);
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struct sdiohal_list_t *sdiohal_get_rx_channel_list(int channel);
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void *sdiohal_get_rx_free_buf(unsigned int *alloc_size, unsigned int read_len);
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void sdiohal_tx_init_retrybuf(void);
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int sdiohal_misc_init(void);
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void sdiohal_misc_deinit(void);
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/* sdiohal main.c */
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void sdiohal_sdio_tx_status(void);
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unsigned int sdiohal_get_trans_pac_num(void);
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int sdiohal_sdio_pt_write(unsigned char *src, unsigned int datalen);
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int sdiohal_sdio_pt_read(unsigned char *src, unsigned int datalen);
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int sdiohal_adma_pt_write(struct sdiohal_list_t *data_list);
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int sdiohal_adma_pt_read(struct sdiohal_list_t *data_list);
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int sdiohal_tx_data_list_send(struct sdiohal_list_t *data_list,
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bool pop_flag);
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void sdiohal_enable_rx_irq(void);
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/* for debugfs */
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#ifdef CONFIG_DEBUG_FS
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void sdiohal_debug_init(void);
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void sdiohal_debug_deinit(void);
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#endif
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void sdiohal_print_list_data(int channel, struct sdiohal_list_t *data_list,
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const char *func, int loglevel);
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void sdiohal_print_mbuf_data(int channel, struct mbuf_t *head,
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struct mbuf_t *tail, int num, const char *func,
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int loglevel);
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void sdiohal_list_check(struct sdiohal_list_t *data_list,
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const char *func, bool dir);
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void sdiohal_mbuf_list_check(int channel, struct mbuf_t *head,
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struct mbuf_t *tail, int num,
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const char *func, bool dir, int loglevel);
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int sdiohal_init(void);
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void sdiohal_exit(void);
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int sdiohal_list_push(int chn, struct mbuf_t *head,
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struct mbuf_t *tail, int num);
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int sdiohal_list_direct_write(int channel, struct mbuf_t *head,
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struct mbuf_t *tail, int num);
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/* driect mode,reg access.etc */
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int sdiohal_dt_read(unsigned int addr, void *buf, unsigned int len);
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int sdiohal_dt_write(unsigned int addr, void *buf, unsigned int len);
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int sdiohal_aon_readb(unsigned int addr, unsigned char *val);
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int sdiohal_aon_writeb(unsigned int addr, unsigned char val);
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int sdiohal_writel(unsigned int system_addr, void *buf);
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int sdiohal_readl(unsigned int system_addr, void *buf);
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void sdiohal_dump_aon_reg(void);
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/* for dumpmem */
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unsigned int sdiohal_get_carddump_status(void);
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void sdiohal_set_carddump_status(unsigned int flag);
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/* for loopcheck */
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unsigned long long sdiohal_get_rx_total_cnt(void);
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/* for power on/off */
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int sdiohal_runtime_get(void);
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int sdiohal_runtime_put(void);
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void sdiohal_register_scan_notify(void *func);
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int sdiohal_scan_card(void);
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void sdiohal_remove_card(void);
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#ifdef SDIO_RESET_DEBUG
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/* Some custome platform not export sdio_reset_comm symbol. */
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extern int sdio_reset_comm(struct mmc_card *card);
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int sdiohal_disable_apb_reset(void);
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void sdiohal_reset(bool full_reset);
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#endif
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#endif
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