/*
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ROCKCHIP_PLAT_IRQ_H_
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#define _ROCKCHIP_PLAT_IRQ_H_
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#if defined(CONFIG_ROCKCHIP_RK3128)
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#define GPIO0_PHYS 0x2007C000
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#define GPIO1_PHYS 0x20080000
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#define GPIO2_PHYS 0x20084000
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#define GPIO3_PHYS 0x20088000
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#define GIC_IRQS_NR (4 * 32)
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#define GPIO_IRQS_NR (4 * 32)
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#define GPIO_BANK_NUM 4
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#define GPIO_BANK_PINS 32
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#define IRQ_USB_OTG 42
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#define IRQ_TIMER1 61
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#define IRQ_GPIO0 68
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#define IRQ_GPIO1 69
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#define IRQ_GPIO2 70
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#define IRQ_GPIO3 71
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#elif defined(CONFIG_ROCKCHIP_RK322X)
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#define GPIO0_PHYS 0x11110000
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#define GPIO1_PHYS 0x11120000
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#define GPIO2_PHYS 0x11130000
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#define GPIO3_PHYS 0x11140000
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#define GIC_IRQS_NR (4 * 32)
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#define GPIO_IRQS_NR (4 * 32)
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#define GPIO_BANK_NUM 4
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#define GPIO_BANK_PINS 32
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#define IRQ_USB_OTG 55
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#define IRQ_TIMER1 76
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#define IRQ_PWM 82
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#define IRQ_GPIO0 83
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#define IRQ_GPIO1 84
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#define IRQ_GPIO2 85
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#define IRQ_GPIO3 86
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#elif defined(CONFIG_ROCKCHIP_RK3288)
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#define GPIO0_PHYS 0xFF750000
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#define GPIO1_PHYS 0xFF780000
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#define GPIO2_PHYS 0xFF790000
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#define GPIO3_PHYS 0xFF7A0000
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#define GPIO4_PHYS 0xFF7B0000
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#define GPIO5_PHYS 0xFF7C0000
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#define GPIO6_PHYS 0xFF7D0000
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#define GPIO7_PHYS 0xFF7E0000
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#define GPIO8_PHYS 0xFF7F0000
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#define GIC_IRQS_NR (5 * 32)
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#define GPIO_IRQS_NR (9 * 32)
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#define GPIO_BANK_NUM 9
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#define GPIO_BANK_PINS 32
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#define IRQ_USB_OTG 55
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#define IRQ_TIMER1 99
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#define IRQ_PWM 110
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#define IRQ_GPIO0 113
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#define IRQ_GPIO1 114
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#define IRQ_GPIO2 115
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#define IRQ_GPIO3 116
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#define IRQ_GPIO4 117
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#define IRQ_GPIO5 118
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#define IRQ_GPIO6 119
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#define IRQ_GPIO7 120
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#define IRQ_GPIO8 121
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#elif defined(CONFIG_ROCKCHIP_RK3328)
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#define GPIO0_PHYS 0xFF210000
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#define GPIO1_PHYS 0xFF220000
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#define GPIO2_PHYS 0xFF230000
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#define GPIO3_PHYS 0xFF240000
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#define GIC_IRQS_NR (4 * 32)
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#define GPIO_IRQS_NR (4 * 32)
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#define GPIO_BANK_NUM 4
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#define GPIO_BANK_PINS 32
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#define IRQ_TIMER1 76
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#define IRQ_PWM 82
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#define IRQ_GPIO0 83
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#define IRQ_GPIO1 84
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#define IRQ_GPIO2 85
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#define IRQ_GPIO3 86
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#elif defined(CONFIG_ROCKCHIP_RK3368)
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#define GPIO0_PHYS 0xFF750000
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#define GPIO1_PHYS 0xFF780000
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#define GPIO2_PHYS 0xFF790000
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#define GPIO3_PHYS 0xFF7A0000
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#define GIC_IRQS_NR (5 * 32)
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#define GPIO_IRQS_NR (4 * 32)
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#define GPIO_BANK_NUM 4
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#define GPIO_BANK_PINS 32
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#define IRQ_TIMER0 98
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#define IRQ_TIMER1 99
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#define IRQ_PWM 110
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#define IRQ_GPIO0 113
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#define IRQ_GPIO1 114
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#define IRQ_GPIO2 115
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#define IRQ_GPIO3 116
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#elif defined(CONFIG_ROCKCHIP_RK3399)
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#define GPIO0_PHYS 0xFF720000
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#define GPIO1_PHYS 0xFF730000
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#define GPIO2_PHYS 0xFF780000
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#define GPIO3_PHYS 0xFF788000
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#define GPIO4_PHYS 0xFF790000
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#define IRQ_GPIO0 46
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#define IRQ_GPIO1 47
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#define IRQ_GPIO2 48
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#define IRQ_GPIO3 49
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#define IRQ_GPIO4 50
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#define IRQ_PWM 93
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#define IRQ_TIMER1 114 /* non-secure */
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#define GIC_IRQS_NR (6 * 32)
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#define GPIO_IRQS_NR (5 * 32)
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#define GPIO_BANK_NUM 5
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#define GPIO_BANK_PINS 32
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#elif defined(CONFIG_ROCKCHIP_PX30)
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#define GPIO0_PHYS 0xff040000
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#define GPIO1_PHYS 0xff250000
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#define GPIO2_PHYS 0xff260000
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#define GPIO3_PHYS 0xff270000
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#define IRQ_GPIO0 35
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#define IRQ_GPIO1 36
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#define IRQ_GPIO2 37
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#define IRQ_GPIO3 38
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#define IRQ_PWM0 56
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#define IRQ_PWM1 57
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#define IRQ_TIMER0 62 /* non-secure */
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#define IRQ_TIMER1 63 /* non-secure */
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#define GIC_IRQS_NR (4 * 32)
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#define GPIO_IRQS_NR (4 * 32)
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#define GPIO_BANK_NUM 4
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#define GPIO_BANK_PINS 32
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#elif defined(CONFIG_ROCKCHIP_RK3308)
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#define GPIO0_PHYS 0xff220000
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#define GPIO1_PHYS 0xff230000
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#define GPIO2_PHYS 0xff240000
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#define GPIO3_PHYS 0xff250000
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#define GPIO4_PHYS 0xff260000
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#define IRQ_TIMER1 58 /* ch0 ns timer1 */
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#define IRQ_GPIO0 72
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#define IRQ_GPIO1 73
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#define IRQ_GPIO2 74
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#define IRQ_GPIO3 75
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#define IRQ_GPIO4 76
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#define GIC_IRQS_NR (5 * 32)
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#define GPIO_IRQS_NR (5 * 32)
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#define GPIO_BANK_NUM 5
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#define GPIO_BANK_PINS 32
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#elif defined(CONFIG_ROCKCHIP_RK1808)
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#define GPIO0_PHYS 0xff4c0000
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#define GPIO1_PHYS 0xff690000
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#define GPIO2_PHYS 0xff6a0000
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#define GPIO3_PHYS 0xff6b0000
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#define GPIO4_PHYS 0xff6c0000
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#define IRQ_GPIO0 35
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#define IRQ_GPIO1 36
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#define IRQ_GPIO2 37
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#define IRQ_GPIO3 38
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#define IRQ_GPIO4 114
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#define IRQ_TIMER0 58
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#define IRQ_TIMER1 59
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#define GIC_IRQS_NR (5 * 32)
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#define GPIO_IRQS_NR (5 * 32)
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#define GPIO_BANK_NUM 5
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#define GPIO_BANK_PINS 32
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#elif defined(CONFIG_ROCKCHIP_RV1106)
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#define GPIO0_PHYS 0xff460000
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#define GPIO1_PHYS 0xff620000
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#define GPIO2_PHYS 0xff630000
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#define GPIO3_PHYS 0xff640000
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#define GPIO4_PHYS 0xff650000
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#define GIC_IRQS_NR (5 * 32)
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#define GPIO_IRQS_NR (5 * 32)
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#define GPIO_BANK_NUM 5
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#define GPIO_BANK_PINS 32
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#define IRQ_USB_OTG 117
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#define IRQ_TIMER1 57
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#define IRQ_GPIO0 66
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#define IRQ_GPIO1 67
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#define IRQ_GPIO2 68
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#define IRQ_GPIO3 69
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#define IRQ_GPIO4 70
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#elif defined(CONFIG_ROCKCHIP_RV1126)
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#define GPIO0_PHYS 0xff460000
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#define GPIO1_PHYS 0xff620000
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#define GPIO2_PHYS 0xff630000
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#define GPIO3_PHYS 0xff640000
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#define GPIO4_PHYS 0xff650000
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#define GIC_IRQS_NR (5 * 32)
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#define GPIO_IRQS_NR (5 * 32)
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#define GPIO_BANK_NUM 5
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#define GPIO_BANK_PINS 32
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#define IRQ_USB_OTG 117
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#define IRQ_TIMER1 57
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#define IRQ_GPIO0 66
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#define IRQ_GPIO1 67
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#define IRQ_GPIO2 68
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#define IRQ_GPIO3 69
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#define IRQ_GPIO4 70
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#elif defined(CONFIG_ROCKCHIP_RK3568)
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#define GPIO0_PHYS 0xfdd60000
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#define GPIO1_PHYS 0xfe740000
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#define GPIO2_PHYS 0xfe750000
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#define GPIO3_PHYS 0xfe760000
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#define GPIO4_PHYS 0xfe770000
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#define GIC_IRQS_NR (5 * 32)
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#define GPIO_IRQS_NR (5 * 32)
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#define GPIO_BANK_NUM 5
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#define GPIO_BANK_PINS 32
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#define IRQ_TIMER0 141
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#define IRQ_GPIO0 65
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#define IRQ_GPIO1 66
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#define IRQ_GPIO2 67
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#define IRQ_GPIO3 68
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#define IRQ_GPIO4 69
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#elif defined(CONFIG_ROCKCHIP_RK3588)
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#define GPIO0_PHYS 0xfd8a0000
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#define GPIO1_PHYS 0xfec20000
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#define GPIO2_PHYS 0xfec30000
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#define GPIO3_PHYS 0xfec40000
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#define GPIO4_PHYS 0xfec50000
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#define GIC_IRQS_NR (455)
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#define GPIO_IRQS_NR (5 * 32)
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#define GPIO_BANK_NUM 5
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#define GPIO_BANK_PINS 32
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#define IRQ_TIMER0 321
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#define IRQ_GPIO0 309
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#define IRQ_GPIO1 310
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#define IRQ_GPIO2 311
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#define IRQ_GPIO3 312
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#define IRQ_GPIO4 313
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#else
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"Missing define RIQ relative things"
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#endif
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#endif /* _ROCKCHIP_PLAT_IRQ_H_ */
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