/*
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* Copyright (C) 2014 NVIDIA Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __POWER_AS3722_H__
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#define __POWER_AS3722_H__
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#define AS3722_GPIO_OUTPUT_VDDH (1 << 0)
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#define AS3722_GPIO_INVERT (1 << 1)
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#define AS3722_DEVICE_ID 0x0c
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#define AS3722_SD_VOLTAGE(n) (0x00 + (n))
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#define AS3722_LDO_VOLTAGE(n) (0x10 + (n))
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#define AS3722_SD_CONTROL 0x4d
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#define AS3722_LDO_CONTROL 0x4e
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#define AS3722_ASIC_ID1 0x90
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#define AS3722_ASIC_ID2 0x91
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#define AS3722_GPIO_CONTROL(n) (0x08 + (n))
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#define AS3722_GPIO_SIGNAL_OUT 0x20
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#define AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH (1 << 0)
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#define AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL (7 << 0)
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#define AS3722_GPIO_CONTROL_INVERT (1 << 7)
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int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value);
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#endif /* __POWER_AS3722_H__ */
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