hc
2025-02-14 bbb9540dc49f70f6b703d1c8d1b85fa5f602d86e
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/*
 * Copyright (C) 2016 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:    GPL-2.0+
 */
 
#include <common.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mx7ulp-pins.h>
#include <asm/arch/iomux.h>
 
DECLARE_GLOBAL_DATA_PTR;
 
#define UART_PAD_CTRL    (PAD_CTL_PUS_UP)
 
int dram_init(void)
{
   gd->ram_size = PHYS_SDRAM_SIZE;
 
   return 0;
}
 
static iomux_cfg_t const lpuart4_pads[] = {
   MX7ULP_PAD_PTC3__LPUART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
   MX7ULP_PAD_PTC2__LPUART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
 
static void setup_iomux_uart(void)
{
   mx7ulp_iomux_setup_multiple_pads(lpuart4_pads,
                    ARRAY_SIZE(lpuart4_pads));
}
 
int board_early_init_f(void)
{
   setup_iomux_uart();
 
   return 0;
}
 
int board_init(void)
{
   /* address of boot parameters */
   gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
   return 0;
}