/*
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* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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#include "skeleton.dtsi"
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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console = &uart0;
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};
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cpu_card {
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core_clk: core_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <1000000000>;
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u-boot,dm-pre-reloc;
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};
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};
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uart0: serial0@f0005000 {
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compatible = "snps,dw-apb-uart";
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reg = <0xf0005000 0x1000>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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ethernet@f0008000 {
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#interrupt-cells = <1>;
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compatible = "altr,socfpga-stmmac";
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reg = <0xf0008000 0x2000>;
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phy-mode = "gmii";
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};
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ehci@0xf0040000 {
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compatible = "generic-ehci";
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reg = <0xf0040000 0x100>;
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};
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ohci@0xf0060000 {
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compatible = "generic-ohci";
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reg = <0xf0060000 0x100>;
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};
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};
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