/*
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* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _DT_BINDINGS_DRAM_ROCKCHIP_RK3128_H
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#define _DT_BINDINGS_DRAM_ROCKCHIP_RK3128_H
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#define BIT(nr) (1UL << (nr))
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#define DDR3_DS_34ohm BIT(1)
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#define DDR3_DS_40ohm (0x0)
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#define LP2_DS_34ohm (0x1)
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#define LP2_DS_40ohm (0x2)
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#define LP2_DS_48ohm (0x3)
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#define LP2_DS_60ohm (0x4)
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#define LP2_DS_68_6ohm (0x5) /* optional */
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#define LP2_DS_80ohm (0x6)
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#define LP2_DS_120ohm (0x7) /* optional */
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#define DDR3_ODT_DIS (0)
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#define DDR3_ODT_40ohm (BIT(2) | BIT(6))
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#define DDR3_ODT_60ohm BIT(2)
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#define DDR3_ODT_120ohm BIT(6)
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#define PHY_RON_DISABLE (0)
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#define PHY_RON_309ohm (1)
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#define PHY_RON_155ohm (2)
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#define PHY_RON_103ohm (3)
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#define PHY_RON_77ohm (4)
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#define PHY_RON_63ohm (5)
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#define PHY_RON_52ohm (6)
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#define PHY_RON_45ohm (7)
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#define PHY_RON_62ohm (9)
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#define PHY_RON_44ohm (11)
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#define PHY_RON_39ohm (12)
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#define PHY_RON_34ohm (13)
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#define PHY_RON_31ohm (14)
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#define PHY_RON_28ohm (15)
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#define PHY_RTT_DISABLE (0)
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#define PHY_RTT_816ohm (1)
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#define PHY_RTT_431ohm (2)
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#define PHY_RTT_287ohm (3)
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#define PHY_RTT_216ohm (4)
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#define PHY_RTT_172ohm (5)
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#define PHY_RTT_145ohm (6)
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#define PHY_RTT_124ohm (7)
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#define PHY_RTT_215ohm (8)
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#define PHY_RTT_144ohm (10)
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#define PHY_RTT_123ohm (11)
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#define PHY_RTT_108ohm (12)
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#define PHY_RTT_96ohm (13)
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#define PHY_RTT_86ohm (14)
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#define PHY_RTT_78ohm (15)
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#endif /* _DT_BINDINGS_DRAM_ROCKCHIP_RK3128_H */
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