/*
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* MIPI DSI Bus
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*
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* Copyright (c) Fuzhou Rockchip Electronics Co.Ltd
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* Authors:
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* Mark Yao <yzq@rock-chips.com>
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*
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* based on include/drm/drm_mipi_dsi.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _DRM_MIPI_DSI_H__
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#define _DRM_MIPI_DSI_H__
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/* DSI mode flags */
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/* video mode */
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#define MIPI_DSI_MODE_VIDEO (1 << 0)
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/* video burst mode */
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#define MIPI_DSI_MODE_VIDEO_BURST (1 << 1)
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/* video pulse mode */
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#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE (1 << 2)
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/* enable auto vertical count mode */
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#define MIPI_DSI_MODE_VIDEO_AUTO_VERT (1 << 3)
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/* enable hsync-end packets in vsync-pulse and v-porch area */
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#define MIPI_DSI_MODE_VIDEO_HSE (1 << 4)
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/* disable hfront-porch area */
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#define MIPI_DSI_MODE_VIDEO_HFP (1 << 5)
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/* disable hback-porch area */
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#define MIPI_DSI_MODE_VIDEO_HBP (1 << 6)
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/* disable hsync-active area */
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#define MIPI_DSI_MODE_VIDEO_HSA (1 << 7)
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/* flush display FIFO on vsync pulse */
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#define MIPI_DSI_MODE_VSYNC_FLUSH (1 << 8)
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/* disable EoT packets in HS mode */
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#define MIPI_DSI_MODE_EOT_PACKET (1 << 9)
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/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
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#define MIPI_DSI_CLOCK_NON_CONTINUOUS (1 << 10)
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/* transmit data in low power */
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#define MIPI_DSI_MODE_LPM (1 << 11)
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#define MIPI_DSI_FMT_RGB888 0
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#define MIPI_DSI_FMT_RGB666 1
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#define MIPI_DSI_FMT_RGB666_PACKED 2
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#define MIPI_DSI_FMT_RGB565 3
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#define MIPI_CSI_FMT_RAW8 0x10
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#define MIPI_CSI_FMT_RAW10 0x11
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#endif /* __DRM_MIPI_DSI__ */
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