/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
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*/
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#ifndef DT_CLOCK_OXSEMI_OX820_H
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#define DT_CLOCK_OXSEMI_OX820_H
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/* PLLs */
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#define CLK_820_PLLA 0
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#define CLK_820_PLLB 1
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/* Gate Clocks */
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#define CLK_820_LEON 2
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#define CLK_820_DMA_SGDMA 3
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#define CLK_820_CIPHER 4
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#define CLK_820_SD 5
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#define CLK_820_SATA 6
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#define CLK_820_AUDIO 7
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#define CLK_820_USBMPH 8
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#define CLK_820_ETHA 9
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#define CLK_820_PCIEA 10
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#define CLK_820_NAND 11
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#define CLK_820_PCIEB 12
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#define CLK_820_ETHB 13
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#define CLK_820_REF600 14
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#define CLK_820_USBDEV 15
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#endif /* DT_CLOCK_OXSEMI_OX820_H */
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