/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
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*/
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#ifndef __DTS_HI3519_CLOCK_H
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#define __DTS_HI3519_CLOCK_H
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#define HI3519_FMC_CLK 1
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#define HI3519_SPI0_CLK 2
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#define HI3519_SPI1_CLK 3
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#define HI3519_SPI2_CLK 4
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#define HI3519_UART0_CLK 5
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#define HI3519_UART1_CLK 6
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#define HI3519_UART2_CLK 7
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#define HI3519_UART3_CLK 8
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#define HI3519_UART4_CLK 9
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#define HI3519_PWM_CLK 10
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#define HI3519_DMA_CLK 11
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#define HI3519_IR_CLK 12
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#define HI3519_ETH_PHY_CLK 13
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#define HI3519_ETH_MAC_CLK 14
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#define HI3519_ETH_MACIF_CLK 15
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#define HI3519_USB2_BUS_CLK 16
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#define HI3519_USB2_PORT_CLK 17
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#define HI3519_USB3_CLK 18
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#endif /* __DTS_HI3519_CLOCK_H */
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