// SPDX-License-Identifier: GPL-2.0+
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/*
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* FB driver for the ST7735R LCD Controller
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*
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* Copyright (C) 2013 Noralf Tronnes
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <video/mipi_display.h>
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#include "fbtft.h"
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#define DRVNAME "fb_st7735r"
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#define DEFAULT_GAMMA "0F 1A 0F 18 2F 28 20 22 1F 1B 23 37 00 07 02 10\n" \
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"0F 1B 0F 17 33 2C 29 2E 30 30 39 3F 00 07 03 10"
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static const s16 default_init_sequence[] = {
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-1, MIPI_DCS_SOFT_RESET,
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-2, 150, /* delay */
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-1, MIPI_DCS_EXIT_SLEEP_MODE,
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-2, 500, /* delay */
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/* FRMCTR1 - frame rate control: normal mode
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* frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D)
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*/
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-1, 0xB1, 0x01, 0x2C, 0x2D,
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/* FRMCTR2 - frame rate control: idle mode
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* frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D)
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*/
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-1, 0xB2, 0x01, 0x2C, 0x2D,
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/* FRMCTR3 - frame rate control - partial mode
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* dot inversion mode, line inversion mode
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*/
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-1, 0xB3, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D,
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/* INVCTR - display inversion control
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* no inversion
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*/
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-1, 0xB4, 0x07,
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/* PWCTR1 - Power Control
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* -4.6V, AUTO mode
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*/
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-1, 0xC0, 0xA2, 0x02, 0x84,
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/* PWCTR2 - Power Control
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* VGH25 = 2.4C VGSEL = -10 VGH = 3 * AVDD
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*/
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-1, 0xC1, 0xC5,
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/* PWCTR3 - Power Control
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* Opamp current small, Boost frequency
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*/
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-1, 0xC2, 0x0A, 0x00,
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/* PWCTR4 - Power Control
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* BCLK/2, Opamp current small & Medium low
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*/
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-1, 0xC3, 0x8A, 0x2A,
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/* PWCTR5 - Power Control */
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-1, 0xC4, 0x8A, 0xEE,
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/* VMCTR1 - Power Control */
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-1, 0xC5, 0x0E,
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-1, MIPI_DCS_EXIT_INVERT_MODE,
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-1, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT,
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-1, MIPI_DCS_SET_DISPLAY_ON,
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-2, 100, /* delay */
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-1, MIPI_DCS_ENTER_NORMAL_MODE,
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-2, 10, /* delay */
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/* end marker */
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-3
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};
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static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
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{
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write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
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xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
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write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
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ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
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write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
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}
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#define MY BIT(7)
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#define MX BIT(6)
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#define MV BIT(5)
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static int set_var(struct fbtft_par *par)
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{
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/* MADCTL - Memory data access control
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* RGB/BGR:
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* 1. Mode selection pin SRGB
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* RGB H/W pin for color filter setting: 0=RGB, 1=BGR
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* 2. MADCTL RGB bit
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* RGB-BGR ORDER color filter panel: 0=RGB, 1=BGR
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*/
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switch (par->info->var.rotate) {
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case 0:
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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MX | MY | (par->bgr << 3));
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break;
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case 270:
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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MY | MV | (par->bgr << 3));
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break;
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case 180:
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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par->bgr << 3);
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break;
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case 90:
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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MX | MV | (par->bgr << 3));
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break;
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}
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return 0;
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}
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/*
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* Gamma string format:
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* VRF0P VOS0P PK0P PK1P PK2P PK3P PK4P PK5P PK6P PK7P PK8P PK9P SELV0P SELV1P SELV62P SELV63P
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* VRF0N VOS0N PK0N PK1N PK2N PK3N PK4N PK5N PK6N PK7N PK8N PK9N SELV0N SELV1N SELV62N SELV63N
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*/
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#define CURVE(num, idx) curves[(num) * par->gamma.num_values + (idx)]
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static int set_gamma(struct fbtft_par *par, u32 *curves)
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{
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int i, j;
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/* apply mask */
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for (i = 0; i < par->gamma.num_curves; i++)
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for (j = 0; j < par->gamma.num_values; j++)
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CURVE(i, j) &= 0x3f;
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for (i = 0; i < par->gamma.num_curves; i++)
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write_reg(par, 0xE0 + i,
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CURVE(i, 0), CURVE(i, 1),
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CURVE(i, 2), CURVE(i, 3),
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CURVE(i, 4), CURVE(i, 5),
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CURVE(i, 6), CURVE(i, 7),
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CURVE(i, 8), CURVE(i, 9),
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CURVE(i, 10), CURVE(i, 11),
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CURVE(i, 12), CURVE(i, 13),
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CURVE(i, 14), CURVE(i, 15));
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return 0;
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}
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#undef CURVE
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static struct fbtft_display display = {
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.regwidth = 8,
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.width = 128,
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.height = 160,
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.init_sequence = default_init_sequence,
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.gamma_num = 2,
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.gamma_len = 16,
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.gamma = DEFAULT_GAMMA,
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.fbtftops = {
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.set_addr_win = set_addr_win,
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.set_var = set_var,
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.set_gamma = set_gamma,
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},
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};
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FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7735r", &display);
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MODULE_ALIAS("spi:" DRVNAME);
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MODULE_ALIAS("platform:" DRVNAME);
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MODULE_ALIAS("spi:st7735r");
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MODULE_ALIAS("platform:st7735r");
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MODULE_DESCRIPTION("FB driver for the ST7735R LCD Controller");
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MODULE_AUTHOR("Noralf Tronnes");
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MODULE_LICENSE("GPL");
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