/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* pv88060-regulator.h - Regulator definitions for PV88060
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* Copyright (C) 2015 Powerventure Semiconductor Ltd.
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*/
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#ifndef __PV88060_REGISTERS_H__
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#define __PV88060_REGISTERS_H__
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/* System Control and Event Registers */
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#define PV88060_REG_EVENT_A 0x04
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#define PV88060_REG_MASK_A 0x08
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#define PV88060_REG_MASK_B 0x09
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#define PV88060_REG_MASK_C 0x0A
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/* Regulator Registers */
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#define PV88060_REG_BUCK1_CONF0 0x1B
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#define PV88060_REG_BUCK1_CONF1 0x1C
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#define PV88060_REG_LDO1_CONF 0x1D
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#define PV88060_REG_LDO2_CONF 0x1E
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#define PV88060_REG_LDO3_CONF 0x1F
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#define PV88060_REG_LDO4_CONF 0x20
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#define PV88060_REG_LDO5_CONF 0x21
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#define PV88060_REG_LDO6_CONF 0x22
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#define PV88060_REG_LDO7_CONF 0x23
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#define PV88060_REG_SW1_CONF 0x3B
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#define PV88060_REG_SW2_CONF 0x3C
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#define PV88060_REG_SW3_CONF 0x3D
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#define PV88060_REG_SW4_CONF 0x3E
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#define PV88060_REG_SW5_CONF 0x3F
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#define PV88060_REG_SW6_CONF 0x40
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/* PV88060_REG_EVENT_A (addr=0x04) */
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#define PV88060_E_VDD_FLT 0x01
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#define PV88060_E_OVER_TEMP 0x02
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/* PV88060_REG_MASK_A (addr=0x08) */
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#define PV88060_M_VDD_FLT 0x01
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#define PV88060_M_OVER_TEMP 0x02
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/* PV88060_REG_BUCK1_CONF0 (addr=0x1B) */
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#define PV88060_BUCK_EN 0x80
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#define PV88060_VBUCK_MASK 0x7F
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/* PV88060_REG_LDO1/2/3/4/5/6/7_CONT */
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#define PV88060_LDO_EN 0x40
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#define PV88060_VLDO_MASK 0x3F
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/* PV88060_REG_SW1/2/3/4/5_CONF */
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#define PV88060_SW_EN 0x80
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/* PV88060_REG_BUCK1_CONF1 (addr=0x1C) */
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#define PV88060_BUCK_ILIM_SHIFT 2
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#define PV88060_BUCK_ILIM_MASK 0x0C
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#define PV88060_BUCK_MODE_SHIFT 0
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#define PV88060_BUCK_MODE_MASK 0x03
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#define PV88060_BUCK_MODE_SLEEP 0x00
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#define PV88060_BUCK_MODE_AUTO 0x01
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#define PV88060_BUCK_MODE_SYNC 0x02
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#endif /* __PV88060_REGISTERS_H__ */
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