// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2020 Rockchip Electronics Co. Ltd.
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*
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* Author: Algea Cao <algea.cao@rock-chips.com>
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/input.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/mfd/rk630.h>
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#include <linux/spi/spi.h>
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#define RK630_CMD_WRITE 0x00000011
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#define RK630_CMD_WRITE_REG0 0x00010011
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#define RK630_CMD_WRITE_REG1 0x00020011
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#define RK630_CMD_WRITE_CTRL0 0x00030011
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#define RK630_CMD_READ 0x00000077
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#define RK630_CMD_READ_BEGIN 0x000000AA
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#define RK630_CMD_QUERY 0x000000FF
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#define RK630_CMD_QUERY_REG2 0x000001FF
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#define RK630_CMD_QUICK_WRITE 0x00030011
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#define RK630_OP_STATE_ID_MASK (0xffff0000)
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#define RK630_OP_STATE_ID (0X16080000)
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#define RK630_OP_STATE_MASK (0x0000ffff)
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#define RK630_OP_STATE_WRITE_ERROR (0x01 << 0)
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#define RK630_OP_STATE_WRITE_OVERFLOW (0x01 << 1)
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#define RK630_OP_STATE_WRITE_UNFINISHED (0x01 << 2)
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#define RK630_OP_STATE_READ_ERROR (0x01 << 8)
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#define RK630_OP_STATE_READ_UNDERFLOW (0x01 << 9)
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#define RK630_OP_STATE_PRE_READ_ERROR (0x01 << 10)
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#define RK630_MAX_OP_BYTES (60000)
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static int rk630_spi_ctrl_init(struct spi_device *spi)
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{
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u32 write_cmd = RK630_CMD_WRITE_CTRL0;
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u32 buf = 0x00000008;
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struct spi_transfer write_cmd_packet = {
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.tx_buf = &write_cmd,
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.len = 4,
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};
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struct spi_transfer data_packet = {
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.tx_buf = &buf,
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.len = 4,
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};
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struct spi_message m;
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spi_message_init(&m);
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spi_message_add_tail(&write_cmd_packet, &m);
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spi_message_add_tail(&data_packet, &m);
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return spi_sync(spi, &m);
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}
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static int rk630_spi_write(struct spi_device *spi,
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u32 addr, const u32 *data, size_t data_len)
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{
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int ret = 0;
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u32 write_cmd = RK630_CMD_WRITE;
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struct spi_transfer write_cmd_packet = {
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.tx_buf = &write_cmd,
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.len = sizeof(write_cmd),
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};
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struct spi_transfer addr_packet = {
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.tx_buf = &addr,
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.len = sizeof(addr),
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};
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struct spi_transfer data_packet = {
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.tx_buf = data,
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.len = data_len,
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};
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struct spi_message m;
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spi_message_init(&m);
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spi_message_add_tail(&write_cmd_packet, &m);
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spi_message_add_tail(&addr_packet, &m);
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spi_message_add_tail(&data_packet, &m);
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ret = spi_sync(spi, &m);
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return ret;
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}
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static int rk630_regmap_write(void *context, const void *data, size_t count)
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{
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struct device *dev = context;
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struct spi_device *spi = to_spi_device(dev);
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u32 buf[count];
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if (count < 8) {
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dev_err(&spi->dev, "regmap write err!\n");
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return -EINVAL;
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}
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memcpy(buf, data, count);
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return rk630_spi_write(spi, buf[0], &buf[1], (count - 4));
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}
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static int rk630_spi_read(struct spi_device *spi,
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u32 addr, u32 *data, size_t data_len)
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{
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int ret;
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u32 read_cmd = RK630_CMD_READ | (1 << 16);
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u32 read_begin_cmd = RK630_CMD_READ_BEGIN;
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u32 dummy = 0;
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struct spi_transfer read_cmd_packet = {
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.tx_buf = &read_cmd,
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.len = sizeof(read_cmd),
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};
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struct spi_transfer addr_packet = {
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.tx_buf = &addr,
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.len = sizeof(addr),
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};
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struct spi_transfer read_dummy_packet = {
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.tx_buf = &dummy,
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.len = sizeof(dummy),
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};
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struct spi_transfer read_begin_cmd_packet = {
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.tx_buf = &read_begin_cmd,
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.len = sizeof(read_begin_cmd),
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};
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struct spi_transfer data_packet = {
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.rx_buf = data,
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.len = data_len,
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};
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struct spi_message m;
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spi_message_init(&m);
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spi_message_add_tail(&read_cmd_packet, &m);
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spi_message_add_tail(&addr_packet, &m);
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spi_message_add_tail(&read_dummy_packet, &m);
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spi_message_add_tail(&read_begin_cmd_packet, &m);
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spi_message_add_tail(&data_packet, &m);
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ret = spi_sync(spi, &m);
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return ret;
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}
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static int rk630_regmap_read(void *context,
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const void *reg, size_t reg_size,
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void *val, size_t val_size)
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{
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struct device *dev = context;
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struct spi_device *spi = to_spi_device(dev);
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u32 rx_buf[2] = { 0 };
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int ret;
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if (reg_size != sizeof(u32) || val_size != sizeof(u32))
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return -EINVAL;
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/* Copy address to read from into first element of SPI buffer. */
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memcpy(rx_buf, reg, sizeof(u32));
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ret = rk630_spi_read(spi, rx_buf[0], &rx_buf[1], val_size);
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if (ret < 0) {
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dev_err(&spi->dev, "rk630 spi read err\n");
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return ret;
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}
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memcpy(val, &rx_buf[1], val_size);
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return 0;
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}
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static struct regmap_bus rk630_regmap = {
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.write = rk630_regmap_write,
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.read = rk630_regmap_read,
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.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
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.val_format_endian_default = REGMAP_ENDIAN_NATIVE,
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};
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static int
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rk630_spi_probe(struct spi_device *spi)
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{
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struct device *dev = &spi->dev;
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struct rk630 *rk630;
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int ret;
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spi->bits_per_word = 8;
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ret = spi_setup(spi);
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if (ret < 0)
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return ret;
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rk630 = devm_kzalloc(dev, sizeof(*rk630), GFP_KERNEL);
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if (!rk630)
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return -ENOMEM;
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rk630->dev = dev;
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spi_set_drvdata(spi, rk630);
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rk630->grf = devm_regmap_init(&spi->dev, &rk630_regmap,
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&spi->dev, &rk630_grf_regmap_config);
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if (IS_ERR(rk630->grf)) {
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ret = PTR_ERR(rk630->grf);
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dev_err(dev, "failed to allocate grf register map: %d\n", ret);
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return ret;
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}
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rk630->cru = devm_regmap_init(&spi->dev, &rk630_regmap,
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&spi->dev, &rk630_cru_regmap_config);
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if (IS_ERR(rk630->cru)) {
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ret = PTR_ERR(rk630->cru);
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dev_err(dev, "failed to allocate cru register map: %d\n", ret);
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return ret;
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}
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rk630->tve = devm_regmap_init(&spi->dev, &rk630_regmap,
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&spi->dev, &rk630_tve_regmap_config);
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if (IS_ERR(rk630->tve)) {
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ret = PTR_ERR(rk630->tve);
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dev_err(rk630->dev, "Failed to initialize tve regmap: %d\n",
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ret);
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return ret;
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}
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ret = rk630_core_probe(rk630);
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if (ret)
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return ret;
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rk630_spi_ctrl_init(spi);
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return 0;
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}
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static const struct of_device_id rk630_spi_of_match[] = {
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{ .compatible = "rockchip,rk630", },
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{}
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};
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MODULE_DEVICE_TABLE(of, rk630_spi_of_match);
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static const struct spi_device_id rk630_spi_id[] = {
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{ "rk630", 0 },
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{}
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};
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MODULE_DEVICE_TABLE(spi, rk630_spi_id);
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static struct spi_driver rk630_spi_driver = {
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.driver = {
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.name = "rk630",
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.of_match_table = of_match_ptr(rk630_spi_of_match),
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},
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.probe = rk630_spi_probe,
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.id_table = rk630_spi_id,
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};
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module_spi_driver(rk630_spi_driver);
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MODULE_AUTHOR("Algea Cao <Algea.cao@rock-chips.com>");
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MODULE_DESCRIPTION("Rockchip rk630 MFD SPI driver");
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MODULE_LICENSE("GPL v2");
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