/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _SPARC64_PSTATE_H
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#define _SPARC64_PSTATE_H
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#include <linux/const.h>
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/* The V9 PSTATE Register (with SpitFire extensions).
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*
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* -----------------------------------------------------------------------
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* | Resv | IG | MG | CLE | TLE | MM | RED | PEF | AM | PRIV | IE | AG |
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* -----------------------------------------------------------------------
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* 63 12 11 10 9 8 7 6 5 4 3 2 1 0
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*/
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/* IG on V9 conflicts with MCDE on M7. PSTATE_MCDE will only be used on
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* processors that support ADI which do not use IG, hence there is no
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* functional conflict
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*/
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#define PSTATE_IG _AC(0x0000000000000800,UL) /* Interrupt Globals. */
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#define PSTATE_MCDE _AC(0x0000000000000800,UL) /* MCD Enable */
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#define PSTATE_MG _AC(0x0000000000000400,UL) /* MMU Globals. */
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#define PSTATE_CLE _AC(0x0000000000000200,UL) /* Current Little Endian.*/
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#define PSTATE_TLE _AC(0x0000000000000100,UL) /* Trap Little Endian. */
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#define PSTATE_MM _AC(0x00000000000000c0,UL) /* Memory Model. */
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#define PSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TotalStoreOrder */
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#define PSTATE_PSO _AC(0x0000000000000040,UL) /* MM: PartialStoreOrder */
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#define PSTATE_RMO _AC(0x0000000000000080,UL) /* MM: RelaxedMemoryOrder*/
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#define PSTATE_RED _AC(0x0000000000000020,UL) /* Reset Error Debug. */
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#define PSTATE_PEF _AC(0x0000000000000010,UL) /* Floating Point Enable.*/
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#define PSTATE_AM _AC(0x0000000000000008,UL) /* Address Mask. */
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#define PSTATE_PRIV _AC(0x0000000000000004,UL) /* Privilege. */
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#define PSTATE_IE _AC(0x0000000000000002,UL) /* Interrupt Enable. */
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#define PSTATE_AG _AC(0x0000000000000001,UL) /* Alternate Globals. */
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/* The V9 TSTATE Register (with SpitFire and Linux extensions).
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*
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* ---------------------------------------------------------------------
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* | Resv | GL | CCR | ASI | %pil | PSTATE | Resv | CWP |
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* ---------------------------------------------------------------------
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* 63 43 42 40 39 32 31 24 23 20 19 8 7 5 4 0
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*/
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#define TSTATE_GL _AC(0x0000070000000000,UL) /* Global reg level */
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#define TSTATE_CCR _AC(0x000000ff00000000,UL) /* Condition Codes. */
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#define TSTATE_XCC _AC(0x000000f000000000,UL) /* Condition Codes. */
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#define TSTATE_XNEG _AC(0x0000008000000000,UL) /* %xcc Negative. */
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#define TSTATE_XZERO _AC(0x0000004000000000,UL) /* %xcc Zero. */
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#define TSTATE_XOVFL _AC(0x0000002000000000,UL) /* %xcc Overflow. */
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#define TSTATE_XCARRY _AC(0x0000001000000000,UL) /* %xcc Carry. */
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#define TSTATE_ICC _AC(0x0000000f00000000,UL) /* Condition Codes. */
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#define TSTATE_INEG _AC(0x0000000800000000,UL) /* %icc Negative. */
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#define TSTATE_IZERO _AC(0x0000000400000000,UL) /* %icc Zero. */
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#define TSTATE_IOVFL _AC(0x0000000200000000,UL) /* %icc Overflow. */
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#define TSTATE_ICARRY _AC(0x0000000100000000,UL) /* %icc Carry. */
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#define TSTATE_ASI _AC(0x00000000ff000000,UL) /* AddrSpace ID. */
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#define TSTATE_PIL _AC(0x0000000000f00000,UL) /* %pil (Linux traps)*/
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#define TSTATE_PSTATE _AC(0x00000000000fff00,UL) /* PSTATE. */
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/* IG on V9 conflicts with MCDE on M7. TSTATE_MCDE will only be used on
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* processors that support ADI which do not support IG, hence there is
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* no functional conflict
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*/
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#define TSTATE_IG _AC(0x0000000000080000,UL) /* Interrupt Globals.*/
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#define TSTATE_MCDE _AC(0x0000000000080000,UL) /* MCD enable. */
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#define TSTATE_MG _AC(0x0000000000040000,UL) /* MMU Globals. */
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#define TSTATE_CLE _AC(0x0000000000020000,UL) /* CurrLittleEndian. */
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#define TSTATE_TLE _AC(0x0000000000010000,UL) /* TrapLittleEndian. */
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#define TSTATE_MM _AC(0x000000000000c000,UL) /* Memory Model. */
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#define TSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TSO */
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#define TSTATE_PSO _AC(0x0000000000004000,UL) /* MM: PSO */
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#define TSTATE_RMO _AC(0x0000000000008000,UL) /* MM: RMO */
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#define TSTATE_RED _AC(0x0000000000002000,UL) /* Reset Error Debug.*/
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#define TSTATE_PEF _AC(0x0000000000001000,UL) /* FPU Enable. */
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#define TSTATE_AM _AC(0x0000000000000800,UL) /* Address Mask. */
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#define TSTATE_PRIV _AC(0x0000000000000400,UL) /* Privilege. */
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#define TSTATE_IE _AC(0x0000000000000200,UL) /* Interrupt Enable. */
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#define TSTATE_AG _AC(0x0000000000000100,UL) /* Alternate Globals.*/
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#define TSTATE_SYSCALL _AC(0x0000000000000020,UL) /* in syscall trap */
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#define TSTATE_CWP _AC(0x000000000000001f,UL) /* Curr Win-Pointer. */
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/* Floating-Point Registers State Register.
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*
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* --------------------------------
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* | Resv | FEF | DU | DL |
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* --------------------------------
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* 63 3 2 1 0
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*/
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#define FPRS_FEF _AC(0x0000000000000004,UL) /* FPU Enable. */
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#define FPRS_DU _AC(0x0000000000000002,UL) /* Dirty Upper. */
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#define FPRS_DL _AC(0x0000000000000001,UL) /* Dirty Lower. */
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/* Version Register.
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*
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* ------------------------------------------------------
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* | MANUF | IMPL | MASK | Resv | MAXTL | Resv | MAXWIN |
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* ------------------------------------------------------
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* 63 48 47 32 31 24 23 16 15 8 7 5 4 0
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*/
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#define VERS_MANUF _AC(0xffff000000000000,UL) /* Manufacturer. */
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#define VERS_IMPL _AC(0x0000ffff00000000,UL) /* Implementation. */
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#define VERS_MASK _AC(0x00000000ff000000,UL) /* Mask Set Revision.*/
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#define VERS_MAXTL _AC(0x000000000000ff00,UL) /* Max Trap Level. */
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#define VERS_MAXWIN _AC(0x000000000000001f,UL) /* Max RegWindow Idx.*/
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/* Compatibility Feature Register (%asr26), SPARC-T4 and later */
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#define CFR_AES _AC(0x0000000000000001,UL) /* Supports AES opcodes */
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#define CFR_DES _AC(0x0000000000000002,UL) /* Supports DES opcodes */
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#define CFR_KASUMI _AC(0x0000000000000004,UL) /* Supports KASUMI opcodes */
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#define CFR_CAMELLIA _AC(0x0000000000000008,UL) /* Supports CAMELLIA opcodes*/
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#define CFR_MD5 _AC(0x0000000000000010,UL) /* Supports MD5 opcodes */
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#define CFR_SHA1 _AC(0x0000000000000020,UL) /* Supports SHA1 opcodes */
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#define CFR_SHA256 _AC(0x0000000000000040,UL) /* Supports SHA256 opcodes */
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#define CFR_SHA512 _AC(0x0000000000000080,UL) /* Supports SHA512 opcodes */
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#define CFR_MPMUL _AC(0x0000000000000100,UL) /* Supports MPMUL opcodes */
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#define CFR_MONTMUL _AC(0x0000000000000200,UL) /* Supports MONTMUL opcodes */
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#define CFR_MONTSQR _AC(0x0000000000000400,UL) /* Supports MONTSQR opcodes */
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#define CFR_CRC32C _AC(0x0000000000000800,UL) /* Supports CRC32C opcodes */
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#endif /* !(_SPARC64_PSTATE_H) */
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