// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright 2009 Simtec Electronics
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// Ben Dooks <ben@simtec.co.uk>
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// http://armlinux.simtec.co.uk/
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/*
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* NOTE: Code in this file is not used when booting with Device Tree support.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/device.h>
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#include <linux/serial_core.h>
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#include <linux/serial_s3c.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <asm/irq.h>
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#include "regs-clock.h"
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#include "cpu.h"
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#include "devs.h"
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#include "sdhci.h"
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#include "iic-core.h"
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#include "s3c64xx.h"
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#include "onenand-core-s3c64xx.h"
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void __init s3c6400_map_io(void)
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{
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/* setup SDHCI */
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s3c6400_default_sdhci0();
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s3c6400_default_sdhci1();
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s3c6400_default_sdhci2();
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/* the i2c devices are directly compatible with s3c2440 */
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s3c_i2c0_setname("s3c2440-i2c");
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s3c_device_nand.name = "s3c6400-nand";
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s3c_onenand_setname("s3c6400-onenand");
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s3c64xx_onenand1_setname("s3c6400-onenand");
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}
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void __init s3c6400_init_irq(void)
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{
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/* VIC0 does not have IRQS 5..7,
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* VIC1 is fully populated. */
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s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
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}
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static struct bus_type s3c6400_subsys = {
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.name = "s3c6400-core",
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.dev_name = "s3c6400-core",
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};
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static struct device s3c6400_dev = {
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.bus = &s3c6400_subsys,
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};
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static int __init s3c6400_core_init(void)
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{
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/* Not applicable when using DT. */
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if (of_have_populated_dt() || soc_is_s3c64xx())
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return 0;
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return subsys_system_register(&s3c6400_subsys, NULL);
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}
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core_initcall(s3c6400_core_init);
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int __init s3c6400_init(void)
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{
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printk("S3C6400: Initialising architecture\n");
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return device_register(&s3c6400_dev);
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}
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