/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C24XX - Memory map definitions
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*/
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#ifndef __ASM_PLAT_MAP_S3C_H
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#define __ASM_PLAT_MAP_S3C_H __FILE__
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#include "map.h"
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#define S3C24XX_VA_IRQ S3C_VA_IRQ
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#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
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#define S3C24XX_VA_UART S3C_VA_UART
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#define S3C24XX_VA_TIMER S3C_VA_TIMER
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#define S3C24XX_VA_CLKPWR S3C_VA_SYS
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#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
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#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
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#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000)
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#define S3C2410_PA_UART (0x50000000)
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#define S3C24XX_PA_UART S3C2410_PA_UART
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/*
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* GPIO ports
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*
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* the calculation for the VA of this must ensure that
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* it is the same distance apart from the UART in the
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* phsyical address space, as the initial mapping for the IO
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* is done as a 1:1 mapping. This puts it (currently) at
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* 0xFA800000, which is not in the way of any current mapping
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* by the base system.
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*/
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#define S3C2410_PA_GPIO (0x56000000)
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#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
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#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
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#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
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#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
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#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
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#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
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#define S3C2410_ADDR(x) S3C_ADDR(x)
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/* deal with the registers that move under the 2412/2413 */
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#if defined(CONFIG_CPU_S3C2412)
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#ifndef __ASSEMBLY__
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extern void __iomem *s3c24xx_va_gpio2;
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#endif
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#ifdef CONFIG_CPU_S3C2412_ONLY
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#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
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#else
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#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
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#endif
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#else
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#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
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#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
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#endif
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#include "map-s5p.h"
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#endif /* __ASM_PLAT_MAP_S3C_H */
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