// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/mach-integrator/core.c
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*
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* Copyright (C) 2000-2003 Deep Blue Solutions Ltd
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/export.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/memblock.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/serial.h>
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#include <linux/io.h>
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#include <linux/stat.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/pgtable.h>
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#include <asm/mach-types.h>
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#include <asm/mach/time.h>
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#include "hardware.h"
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#include "cm.h"
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#include "common.h"
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static DEFINE_RAW_SPINLOCK(cm_lock);
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static void __iomem *cm_base;
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/**
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* cm_get - get the value from the CM_CTRL register
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*/
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u32 cm_get(void)
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{
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return readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET);
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}
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/**
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* cm_control - update the CM_CTRL register.
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* @mask: bits to change
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* @set: bits to set
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*/
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void cm_control(u32 mask, u32 set)
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{
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unsigned long flags;
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u32 val;
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raw_spin_lock_irqsave(&cm_lock, flags);
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val = readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET) & ~mask;
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writel(val | set, cm_base + INTEGRATOR_HDR_CTRL_OFFSET);
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raw_spin_unlock_irqrestore(&cm_lock, flags);
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}
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void cm_clear_irqs(void)
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{
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/* disable core module IRQs */
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writel(0xffffffffU, cm_base + INTEGRATOR_HDR_IC_OFFSET +
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IRQ_ENABLE_CLEAR);
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}
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static const struct of_device_id cm_match[] = {
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{ .compatible = "arm,core-module-integrator"},
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{ },
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};
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void cm_init(void)
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{
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struct device_node *cm = of_find_matching_node(NULL, cm_match);
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if (!cm) {
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pr_crit("no core module node found in device tree\n");
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return;
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}
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cm_base = of_iomap(cm, 0);
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if (!cm_base) {
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pr_crit("could not remap core module\n");
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return;
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}
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cm_clear_irqs();
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}
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/*
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* We need to stop things allocating the low memory; ideally we need a
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* better implementation of GFP_DMA which does not assume that DMA-able
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* memory starts at zero.
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*/
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void __init integrator_reserve(void)
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{
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memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
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}
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