// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*/
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#include <linux/irqchip.h>
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#include <linux/of_platform.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include <linux/regmap.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include "common.h"
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#include "cpuidle.h"
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#include "hardware.h"
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static void __init imx6sl_fec_init(void)
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{
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struct regmap *gpr;
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/* set FEC clock from internal PLL clock source */
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gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr");
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if (!IS_ERR(gpr)) {
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regmap_update_bits(gpr, IOMUXC_GPR1,
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IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK, 0);
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regmap_update_bits(gpr, IOMUXC_GPR1,
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IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK, 0);
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} else {
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pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n");
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}
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}
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static void __init imx6sl_init_late(void)
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{
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/* imx6sl reuses imx6q cpufreq driver */
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if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
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platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
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if (IS_ENABLED(CONFIG_SOC_IMX6SL) && cpu_is_imx6sl())
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imx6sl_cpuidle_init();
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else if (IS_ENABLED(CONFIG_SOC_IMX6SLL))
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imx6sx_cpuidle_init();
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}
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static void __init imx6sl_init_machine(void)
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{
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of_platform_default_populate(NULL, NULL, NULL);
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if (cpu_is_imx6sl())
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imx6sl_fec_init();
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imx_anatop_init();
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imx6sl_pm_init();
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}
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static void __init imx6sl_init_irq(void)
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{
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imx_gpc_check_dt();
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imx_init_revision_from_anatop();
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imx_init_l2cache();
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imx_src_init();
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irqchip_init();
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if (cpu_is_imx6sl())
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imx6_pm_ccm_init("fsl,imx6sl-ccm");
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else
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imx6_pm_ccm_init("fsl,imx6sll-ccm");
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}
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static const char * const imx6sl_dt_compat[] __initconst = {
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"fsl,imx6sl",
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"fsl,imx6sll",
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NULL,
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};
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DT_MACHINE_START(IMX6SL, "Freescale i.MX6 SoloLite (Device Tree)")
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.l2c_aux_val = 0,
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.l2c_aux_mask = ~0,
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.init_irq = imx6sl_init_irq,
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.init_machine = imx6sl_init_machine,
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.init_late = imx6sl_init_late,
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.dt_compat = imx6sl_dt_compat,
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MACHINE_END
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