// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* MX31 CPU type detection
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*
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* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
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*/
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include "common.h"
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#include "hardware.h"
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#include "iim.h"
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static int mx31_cpu_rev = -1;
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static struct {
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u8 srev;
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const char *name;
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unsigned int rev;
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} mx31_cpu_type[] = {
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{ .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
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{ .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x11, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x13, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 },
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{ .srev = 0x15, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_2 },
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{ .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 },
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{ .srev = 0x29, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_2_0 },
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};
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static int mx31_read_cpu_rev(void)
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{
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void __iomem *iim_base;
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struct device_node *np;
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u32 i, srev;
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np = of_find_compatible_node(NULL, NULL, "fsl,imx31-iim");
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iim_base = of_iomap(np, 0);
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BUG_ON(!iim_base);
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/* read SREV register from IIM module */
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srev = imx_readl(iim_base + MXC_IIMSREV);
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srev &= 0xff;
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for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
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if (srev == mx31_cpu_type[i].srev) {
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imx_print_silicon_rev(mx31_cpu_type[i].name,
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mx31_cpu_type[i].rev);
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return mx31_cpu_type[i].rev;
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}
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imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN);
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return IMX_CHIP_REVISION_UNKNOWN;
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}
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int mx31_revision(void)
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{
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if (mx31_cpu_rev == -1)
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mx31_cpu_rev = mx31_read_cpu_rev();
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return mx31_cpu_rev;
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}
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EXPORT_SYMBOL(mx31_revision);
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