// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
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*/
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/*
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* i.MX27 specific CPU detection code
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*/
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#include <linux/io.h>
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#include <linux/of_address.h>
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#include <linux/module.h>
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#include "hardware.h"
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static int mx27_cpu_rev = -1;
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static int mx27_cpu_partnumber;
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#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
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#define SYSCTRL_OFFSET 0x800 /* Offset from CCM base address */
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static int mx27_read_cpu_rev(void)
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{
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void __iomem *ccm_base;
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struct device_node *np;
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u32 val;
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np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
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ccm_base = of_iomap(np, 0);
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BUG_ON(!ccm_base);
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/*
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* now we have access to the IO registers. As we need
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* the silicon revision very early we read it here to
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* avoid any further hooks
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*/
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val = imx_readl(ccm_base + SYSCTRL_OFFSET + SYS_CHIP_ID);
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mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
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switch (val >> 28) {
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case 0:
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return IMX_CHIP_REVISION_1_0;
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case 1:
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return IMX_CHIP_REVISION_2_0;
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case 2:
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return IMX_CHIP_REVISION_2_1;
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default:
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return IMX_CHIP_REVISION_UNKNOWN;
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}
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}
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/*
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* Returns:
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* the silicon revision of the cpu
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* -EINVAL - not a mx27
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*/
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int mx27_revision(void)
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{
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if (mx27_cpu_rev == -1)
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mx27_cpu_rev = mx27_read_cpu_rev();
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if (mx27_cpu_partnumber != 0x8821)
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return -EINVAL;
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return mx27_cpu_rev;
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}
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EXPORT_SYMBOL(mx27_revision);
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