// SPDX-License-Identifier: GPL-2.0
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/*
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* Handle interrupts from the SRM, assuming no additional weirdness.
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*/
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/irq.h>
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#include "proto.h"
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#include "irq_impl.h"
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/*
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* Is the palcode SMP safe? In other words: can we call cserve_ena/dis
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* at the same time in multiple CPUs? To be safe I added a spinlock
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* but it can be removed trivially if the palcode is robust against smp.
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*/
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DEFINE_SPINLOCK(srm_irq_lock);
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static inline void
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srm_enable_irq(struct irq_data *d)
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{
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spin_lock(&srm_irq_lock);
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cserve_ena(d->irq - 16);
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spin_unlock(&srm_irq_lock);
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}
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static void
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srm_disable_irq(struct irq_data *d)
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{
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spin_lock(&srm_irq_lock);
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cserve_dis(d->irq - 16);
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spin_unlock(&srm_irq_lock);
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}
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/* Handle interrupts from the SRM, assuming no additional weirdness. */
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static struct irq_chip srm_irq_type = {
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.name = "SRM",
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.irq_unmask = srm_enable_irq,
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.irq_mask = srm_disable_irq,
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.irq_mask_ack = srm_disable_irq,
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};
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void __init
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init_srm_irqs(long max, unsigned long ignore_mask)
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{
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long i;
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if (NR_IRQS <= 16)
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return;
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for (i = 16; i < max; ++i) {
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if (i < 64 && ((ignore_mask >> i) & 1))
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continue;
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irq_set_chip_and_handler(i, &srm_irq_type, handle_level_irq);
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irq_set_status_flags(i, IRQ_LEVEL);
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}
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}
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void
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srm_device_interrupt(unsigned long vector)
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{
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int irq = (vector - 0x800) >> 4;
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handle_irq(irq);
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}
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