/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_MACH_CPUTYPE_H
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#define __ASM_MACH_CPUTYPE_H
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#if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
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#include <asm/cputype.h>
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#endif
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/*
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* CPU Stepping CPU_ID CHIP_ID
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*
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* PXA168 S0 0x56158400 0x0000C910
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* PXA168 A0 0x56158400 0x00A0A168
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* PXA910 Y1 0x56158400 0x00F2C920
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* PXA910 A0 0x56158400 0x00F2C910
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* PXA910 A1 0x56158400 0x00A0C910
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* PXA920 Y0 0x56158400 0x00F2C920
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* PXA920 A0 0x56158400 0x00A0C920
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* PXA920 A1 0x56158400 0x00A1C920
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* MMP2 Z0 0x560f5811 0x00F00410
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* MMP2 Z1 0x560f5811 0x00E00410
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* MMP2 A0 0x560f5811 0x00A0A610
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* MMP3 A0 0x562f5842 0x00A02128
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* MMP3 B0 0x562f5842 0x00B02128
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*/
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extern unsigned int mmp_chip_id;
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#ifdef CONFIG_CPU_PXA168
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static inline int cpu_is_pxa168(void)
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{
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return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
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((mmp_chip_id & 0xfff) == 0x168);
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}
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#else
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#define cpu_is_pxa168() (0)
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#endif
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/* cpu_is_pxa910() is shared on both pxa910 and pxa920 */
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#ifdef CONFIG_CPU_PXA910
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static inline int cpu_is_pxa910(void)
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{
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return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
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(((mmp_chip_id & 0xfff) == 0x910) ||
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((mmp_chip_id & 0xfff) == 0x920));
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}
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#else
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#define cpu_is_pxa910() (0)
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#endif
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#if defined(CONFIG_CPU_MMP2) || defined(CONFIG_MACH_MMP2_DT)
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static inline int cpu_is_mmp2(void)
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{
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return (((read_cpuid_id() >> 8) & 0xff) == 0x58) &&
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(((mmp_chip_id & 0xfff) == 0x410) ||
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((mmp_chip_id & 0xfff) == 0x610));
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}
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#else
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#define cpu_is_mmp2() (0)
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#endif
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#ifdef CONFIG_MACH_MMP3_DT
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static inline int cpu_is_mmp3(void)
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{
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return (((read_cpuid_id() >> 8) & 0xff) == 0x58) &&
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((mmp_chip_id & 0xffff) == 0x2128);
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}
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static inline int cpu_is_mmp3_a0(void)
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{
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return (cpu_is_mmp3() &&
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((mmp_chip_id & 0x00ff0000) == 0x00a00000));
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}
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static inline int cpu_is_mmp3_b0(void)
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{
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return (cpu_is_mmp3() &&
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((mmp_chip_id & 0x00ff0000) == 0x00b00000));
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}
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#else
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#define cpu_is_mmp3() (0)
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#define cpu_is_mmp3_a0() (0)
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#define cpu_is_mmp3_b0() (0)
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#endif
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#endif /* __ASM_MACH_CPUTYPE_H */
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